Pin Assignment; Pin Description - Holtek BC68F2130 Manual

Pin Assignment

VSS
PA3/INT0
PA2/PTP/ICPCK/OCDSCK
PA1/PTCK
PA0/PTPI/PTPB/ICPDA/OCDSDA
OSC2
OSC1
VSSRF_PA
BC68F2130
16 NSOP-EP-A
VSS 1
PB3 2
3
PB2
4
PB1
PB0 5
PA3/INT0 6
7
PA2/PTP/ICPCK/OCDSCK
8
PA1/PTCK
PA0/PTPI/PTPB/ICPDA/OCDSDA 9
OSC2 10
OSC1 11
12
NC
BC68F2140/BC68F2150
24 SSOP-EP-A
Note: 1. If the pin-shared pin functions have multiple outputs, the desired pin-shared function is determined by
corresponding software control bits.
2. The OCDSDA and OCDSCK pins are used as the OCDS dedicated pins.

Pin Description

The function of each pin is listed in the following table, however the details behind how each pin is
configured is contained in other sections of the datasheet.
BC68F2130
Pin Name Function
PA0
PTPI
PA0/PTPI/PTPB/
ICPDA/OCDSDA
PTPB
ICPDA
OCDSDA
PA1
PA1/PTCK
PTCK
Rev. 1.50
BC68F2130/BC68F2140/BC68F2150
Sub-1GHz RF Transmitter Flash MCU with OCDS
VDD
1 16
2 15 V15O
3 14
PB4
4 13 PB5
PA0/PTPI/PTPB/ICPDA/OCDSDA
EP
EP
5 12 PA4/INT1
6 11 PA5/CTP
7 10 VDDRF
8 9 RFOUT
VDD
24
23 V15O
PB4
22
PB5
21
PA4/INT1
20
PA5/CTP
19
EP
PA6/CTPB
18
PA7/CTCK
17
PA0/PTPI/PTPB/ICPDA/OCDSDA
VSSRF
16
VDDRF
15
RFOUT
14
VSSRF_PA
13
OPT I/T O/T
PAPU
PAWU ST CMOS General purpose I/O. Register enabled pull-up and wake-up
PAS0
PAS0 ST — PTM capture input
PAS0 — CMOS PTM inverted output
— ST CMOS ICP Address/Data
— ST CMOS OCDS data/address
PAPU
PAWU ST CMOS General purpose I/O. Register enabled pull-up and wake-up
PAS0
PAS0 ST — PTM clock input
8
16 15 14 13
PA2/PTP/ICPCK/OCDSCK
1
PA1/PTCK
2
3
OSC2
4
5
BC68F2130
16 QFN-A
24 23 22
PB0
1
PA3/INT0
2
PA2/PTP/ICPCK/OCDSCK
3
PA1/PTCK
4
5
OSC2
6
7 8 9 10 11 12
BC68F2140
BC68F2150
24 QFN-A
Description
PB4
12
PB5
11
EP
PA4/INT1
10
PA5/CTP
9
6 7 8
21 20 19
PB4
18
PB5
17
PA4/INT1
16
EP
PA5/CTP
15
PA6/CTPB
14
13 PA7/CTCK
January, 22, 2021