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Processor
Configuration
Mirroring population order
Single rank sparing
population order
Multi rank sparing
population order
Fault resilient population
order
Removing a memory module
The procedure for removing a DIMM module and an NVDIMM-N module is identical.
Prerequisites
Follow the safety guidelines listed in
Follow the procedure listed in
CAUTION:
To prevent data loss and potential damage to your system, ensure that your system, LEDs on system,
LEDs on NVDIMM-N and LEDs on NVDIMM-N battery are turned off before removing the NVDIMM-N battery.
If applicable,
remove the air shroud.
WARNING:
Allow the memory modules to cool after you power off the system. Handle the memory modules by the card
edges and avoid touching the components or metallic contacts on the memory module.
CAUTION:
To ensure proper system cooling, memory module blanks must be installed in any memory socket that is not
occupied. Remove memory module blanks only if you intend to install memory modules in those sockets.
Steps
Locate the appropriate memory module socket.
CAUTION:
Handle each memory module only by the card edges, ensuring not to touch the middle of the memory
module or metallic contacts.
100
Installing and removing system components
Memory population
A{1, 2, 3, 4, 5, 6},
B{1, 2, 3, 4, 5, 6},
A{7, 8, 9, 10, 11, 12},
B{7, 8, 9, 10, 11, 12}
A{1}, B{1},
A{2}, B{2},
A{3}, B{3},
A{4}, B{4},
A{5}, B{5},
A{6}, B{6}
A{1}, B{1},
A{2}, B{2},
A{3}, B{3},
A{4}, B{4},
A{5}, B{5},
A{6}, B{6}
A{1, 2, 3, 4, 5, 6},
B{1, 2, 3, 4, 5, 6},
A{7, 8, 9, 10, 11, 12},
B{7, 8, 9, 10, 11, 12}
Safety
instructions.
Before working inside your
system.
Memory population information
channels identically with identical DIMMs
for best performance.
Optimizer population order is not traditional for 8
and 16 DIMMs installations for dual processor.
•
For 8 DIMMs: A1, A2, A4, A5, B1, B2, B4, B5
•
For 16 DIMMs:
A1, A2, A4, A5, A7, A8, A10, A11
B1, B2, B4, B5, B7, B8, B10, B11
Mirroring is supported with 6 or 12 DIMMs per
processor.
•
DIMMs must be populated in the order
specified.
•
Requires two ranks or more per channel.
•
DIMMs must be populated in the order
specified.
•
Requires three ranks or more per channel.
Supported with 6 or 12 DIMMs per processor.
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