Xilinx Kintex UltraScale FPGA KCU1250 Getting Started Manual page 15

Characterization kit ibert, vivado design suite
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3. Select option 1 Configure UltraScale FPGA from SD Card to configure the FPGA from
the SD card:
The IBERT design demonstrations included with the SD cards can be selected using one
of the bitstream numbers listed in
Table 1-1: IBERT Examples Bitstream Number
IBERT Demonstration Design
QUAD_224
QUAD_225
QUAD_226
QUAD_227
QUAD_228
4. Select option (0) to configure the FPGA with the Quad 224 IBERT example design. Press
Enter and review the terminal for configuration progress:
Enter a Bitstream number (0-15):
0
Info: xilinx.sys opened
Info: Opening rev_1/set0/config.def
Info: Configuration definition file "rev_1/set0/config.def"
opened
Info: Clock divider is set to 2
Info: Configuration clock frequency is 25MHz
Info: Bitfile "rev_1/set0/ibert224.bit" opened
...10%...20%...30%...40%...50%...60%...70%...80%...90%...100%
Configuration completed successfully
KCU1250 IBERT Getting Started Guide
UG1061 (v2017.4) December 20, 2017
Chapter 1: KCU1250 IBERT Getting Started Guide
Table
1-1.
Bitstream Number
0
1
2
3
4
www.xilinx.com
15
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