Xilinx Kintex UltraScale FPGA KCU1250 Getting Started Manual page 14

7. Set up a new connection as shown in
8. Open the connection and press the Enter key to view the System Controller options menu.
X-Ref Target - Figure 1-12
9. From the main System Controller menu, select option 1 Set Programmable Clocks to
access the SuperClock-2 options.
10. Use the Programmable Clocks menu option 2 Set Si5368 Frequency to set the output
clock frequencies of the Si5368 clocks to 125 MHz.
11. Select option 2 Free-Run using XA-XB crystal operating mode when prompted.
Configuring the FPGA
The Xilinx Zynq-7000 AP SoC XC7Z010CLG225 System Controller includes a System
Integrated Configuration Engine (System ICE) option. The System ICE can be used to
configure the FPGA, in 8-bit SMAP configuration mode, using one of the *.bit files
provided on the SD card.
The FPGA can also be configured through the Vivado Design Suite using the *.bit files
available on the SD card or online (as collection rdf0352-kcu1250-ibert-2017-4.zip)
at Kintex UltraScale FPGA KCU1250 Characterization Kit
Review UltraScale Architecture Configuration User Guide (UG570)
information about UltraScale device configuration.
1. Insert the SD card provided with the KCU1250 board into the SD card reader slot located
on the bottom-side (upper-right corner) of the KCU1250 board.
2. From the main System Controller menu, select option 7 Configure UltraScale FPGA to
access the SuperClock-2 options.
KCU1250 IBERT Getting Started Guide
UG1061 (v2017.4) December 20, 2017
Chapter 1: KCU1250 IBERT Getting Started Guide
Figure 1-12, and click OK.
Figure 1-12: Terminal Setting
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documentation.
[Ref 4] for additional
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