Trigger Logic 1C (Flic, U602); Pin-Out Diagram - Tektronix 2246 1Y Service Manual

Theory of Operation—2246 1Y and 2246 Mod A Service
Trigger Logic 1C (FLIC)
The Trigger Logic 1C or FLIC (fast-logic integrated
circuit, U602 Diagram 4) does most of the fast logic
functions required to run the oscilloscope. The func­
tions are: A Sweep control, B Sweep control and
measurement gate generation, Z-Axis control, and
trigger status detection.
The A Sweep logic generates the A Sweep gate
signal (A GATE), and provides trigger status infor­
mation about the state of the A Trigger. The B
Sweep logic interfaces to the Delay Time Com­
parators (Diagram 3) and generates the B Sweep
gate (B GATE) and measurement gate signals.
There is also some logic that monitors the B Trigger
signal status when making voltage measurements
with the B Trigger circuit. The Z-Axis control logic
provides outputs for controlling
intensity.
The Trigger Logic circuit is done in an ECL (em itter-
coupled logic) gate array, and all inputs and outputs
are compatible with standard ECL components.
Pin Description
The following is a description of the fast logic pin
outs (see Figure 3 -3 ).
BLANK: Blanking input, from the Display
Logic 1C (U600).
HD1, HDO: Horizontal display select inputs,
from the Display Logic 1C.
ZEN: Z-Axis enable input, from the Display
Logic 1C. Active low.
BUSY: Counter busy signal. Not used in the
2246 1Y and 2246 Mod A.
ATRIG: A Sweep trigger input.
EOAS: End of A Sweep. This signal goes
high when the A Sweep ramp crosses its
end-of-sw eep threshold.
THO: Trigger holdoff input from the Display
Logic 1C.
3-26
the crt beam
S IN : Strobe input. Latches data into the in­
ternal register. Active low.
A1, AO: Address inputs. See Table 3-17 for
addressing codes.
EOBS: End of B Sweep. This signal goes
high when the B Sweep ramp crosses its
end-of-sw eep threshold.
DLY12: Input from first delay comparator.
The comparator for the delay input switches
from low to high after the end of either the
first or the second sweep delay.
1
V ee
2
B L A N K
3
HD1
4
H DO
5
Z EN
6_
7 R
A T R I G i
8 G
E O A S
g
g E
T H O R
_
i °
V 1
v cc £
n
N C G
I
12^
D A T A C
13_
v (FLIC)
v cco
14
A G A T E
15
NC
16_
V
vcco
17
u 1
18
52
19
5 3
2°
5 4
Figure 3-3. Trigger Logic 1C (FLIC, U602)

pin-out diagram.

40
S I N
39
A1
38
AO
37
EO B S
^36
D L Y 1 2
^ 3 5
34
B T R I G
___ 33
MGE
3 2
DS
31
V
v cc
30
TDO
29
M SE L
28
u
v cco
27
C G A T E
26
NC
2 3
V
vcco
24
u u A I L
23
U
b b
22
NC
\
2
v
V EE
6081-06