Adc And Dac System (Diagram 11) - Tektronix 2246 1Y Service Manual

Theory of Operation—2246 1Y and 2246 Mod A Service
Switch Reading
At the same time the ASO LED column is refreshed,
the connected ASO switch column is pulled high
through CR2006. The switch status (low for open or
high for closed) for the active switch column is
parallel loaded into the Switch Board Shift Registers
(U2001 and U2002). This switch status data is then
shifted out serially (by 15 SW BD SR SHIFT clocks)
to the Measurement Processor on the SW BD DATA
return line. The position of a high in the serial data
stream, and knowing the active column, tells the
Measurement Processor the switch in column ASO
that is closed (the CH 1 VOLTS/DIV setting).
Columns with push-button switches may or may not
have a switch closed. A switch closure is interpreted
by the Measurement Processor,
operating conditions needed (determined from the
firmware routines called up to handle a particular
switch closure) are set up.
At the next 2 ms interrupt, the Measurement
Processor loads new data into Cathode Register
U2524 to enable the LED rows, and the column is
advanced to enable the A01 column for refresh and
switch reading. The process described is continual
while the oscilloscope is on.
Part of the Measurement Processor routine stores
the new front panel settings in the System RAM each
time a change is made. At power on (after being
turned o ff), the stored front-panel settings are
recalled from the System
oscilloscope to the same operating state that existed
at power off (with some exceptions).
Diagnostic
When the Measurement Processor is running the
register checks during the DIAGNOSTIC, it can
check the condition of registers U2001 and U2002.
Serial data is placed on the ASO line from the DO bit
of the Measurement Processor data bus. That data
is serially shifted through the two registers to the SW
BD DATA return line. The Measurement Processor
compares the returned data stream with what was
sent. A difference in the data bits shows an error; a
correct comparison passes the test.

ADC AND DAC SYSTEM (Diagram 11)

The ADC and DAC System permits the Measurement
Processor to provide analog control voltages to the
circuitry under its control and to find out certain
analog voltage levels that it must have to do its con­
trol and measurement functions.
3-52
and any new
RAM to return the
Pot M ultiplexer Latch
Latch U2313 latches data from the data bus (D0-D7)
to control multiplexers U2308 and U2309 on this
diagram and U506 on Diagram 7.
Front-Panel Control Multiplexers
Multiplexers U2308 and U2309, controlled by the
Measurement Processor via Pot Mux Latch U2313,
select the front-panel control levels that are com­
pared with the output of the D -to -A Converter
(U2302). The result of that comparison is sent via
signal line AD COMP to the Measurement Processor
(U2501, Diagram 8).
Input Data Latches
Binary data bytes to be converted to analog voltages
are loaded into two latches (U2300 and U2301).
Data Latch U2301 latches data to the DAC Multi­
plexer (U2303). Data Latch U2300 latches data to
D -to -A Converter (U2302).
Digital-to-Analog Converter
The D -to -A Converter (U2302), using 12 data bits,
can produce 4096 discrete output signal current
levels from 0 to 2 mA. Signal current flows through
R2303 to the +2.5 V reference voltage. The resulting
voltage drop across the resistor moves the voltage
at pin 3 of voltage follower U2314 away from +2.5 V
toward 0 V and below. When there is 0 mA output,
the voltage at pin 3 is +2.5 V. At maximum output
current, the voltage at pin 3 is -2 .5 V. Voltage fol­
lower U2314 buffers the voltage and applies it to the
input pin of analog multiplexer U2303, where it is di­
rected to the control circuit selected by the Meas­
urement Processor.
A -TO -D CONVERSION. The output from U2314 is
also applied to comparator U2306. When analog-to-
digital conversion is being done, the Measurement
Processor drives the DAC to produce comparison
voltage levels in a binary search pattern. The output
of U2306 is monitored to determine the smallest
DAC input change that will produce an output
change from the comparator. That value is then
used as the digital representation of the analog
voltage applied to the other pin of the comparator
from the output of Multiplexer U2308 or U2309.
Signals on that multiplexed line are the front panel
potentiometers' wiper voltages and the probe-code
levels.
SampIe-and-Hold Circuits
The analog voltages from the multiplexer U2303
remain stable only for the short period of time that
the DAC is at a fixed output level. Control voltages
to the analog circuitry must remain constant except