A And B Trigger System (Diagram 3) - Tektronix 2246 1Y Service Manual

Theory of Operation—2246 1Y and 2246 Mod A Service
Manual calibration of the vertical signal display to the
crt graticule is done using VO Gain potentiometer
R703. The components between pins 12 and 22 of
U701 (Q704, R726, R727, and R728) provides gain
correction for the small difference in gain between
full bandwidth and bandwidth-limited operation of
the Vertical Output 1C. Correction for a thermal
change between display of the signal and display of
the readout is provided by the RO Jitter adjustment
(R724).
W A R N IN G
Vertical Output Amplifiers Q701 and Q702
run hot and can burn you if touched.
Vertical Output Amplifiers Q701 and Q702 provide
the signal gain necessary to drive the vertical crt
deflection plates. The deflection plates have a com ­
paratively large capacitance, and to change the
voltage as fast as necessary to deflect the crt
beam, the Vertical Output Amplifiers have to handle
large current demands.
capacity is made by
capacitance of the output transistors. The cases of
Q701 and Q702 are NOT the collectors; they are
connected to the transistors' base material; the
case tabs mark the collector leads. In the collector
circuits, T-coils L703 and L704 boost the vertical
bandwidth of the output amplifiers; and R731 and
R732 are damping resistors.
Vertical Comparator
The Vertical Comparator circuit (U702, Q703, and
associated components) allows the Measurement
Processor to determine the gain and offset of the
vertical system up to the input to the Vertical Pre­
amplifier. The circuit is enabled only during the verti­
cal self characterization routine. Known dc voltage
levels are applied to the attenuator inputs, and U702
compares the voltage from the delay line to the
HORIZ POS signal which is being driven in a binary
search pattern. The output voltage is found by
successively narrowing the search levels until the
smallest change possible from the DAC system
causes the Vertical Comparator output to change
states. Using the measured value to compare
against the known input voltage, the Measurement
Processor determines a Vertical Calibration constant
that must be applied to produce accurate voltage
measurements.
3-12
A reduction in circuit
reducing the collector

A AND B TRIGGER SYSTEM (Diagram 3)

Most of the trigger signal switching and trigger level
comparator circuitry is contained on two integrated
circuit devices (U421 and U431). Within the devices
is the logic circuitry that drives the selectable
variables of Trigger SOURCE, Trigger CPLG, and
Trigger SLOPE for both the A and the B Triggers.
Selection of the trigger variables is done by control
bits generated by Display
(Diagram 4). The remaining portions of the circuitry
shown in Diagram 3 include the A and B Trigger
bandwidth limiting circuitry, the TV Trigger Detector
circuitry, the Auxiliary Control Register (part of Shift
Register 1), and the DC Filter for the measurement
system. The B Trigger circuitry does double duty in
that measurements for the DC, +PEAK, -PEAK, and
PEAK-to-PEAK values of a signal are done in the
B Trigger channel. Consequently, voltage measure­
ments cannot be done in ALT or B Horizontal Display
Modes when the B Trigger circuitry is in use.
A and B Trigger Source Selectors
Analog switching of the Trigger signal sources is
done by the circuitry in U421A (for the A Trigger)
and U431A (for the B Trigger). The possible Trigger
SOURCE selections are the same for both the A and
the B Trigger system. They are CH 1, CH 2, CH 3,
CH 4, LINE, and VERT. In ALT Vertical MODE, when
VERT is the selected source a trigger is obtained in
succession for each displayed channel. A stably trig­
gered display will be obtained for each channel
signal without regard to frequency relationships
between the applied signals. If ADD Vertical MODE is
selected, a special adder circuit in U421A and
U431A, adds the CH 1 and CH 2 signals to produce
an ADD trigger signal composed of the two inputs.
The LINE Trigger signal is a sample of the power-line
input voltage. Multiplexer U1106A, in the input path
for the LINE trigger signal, selects between the LINE
signal (for oscilloscope operation) and the TB CAL
signal (used for horizontal self characterization).
When a Voltage Measurement is being done, U431A
in the B Trigger circuit acts as the measurement
channel selector and selects either the CH 1 or the
CH 2 input signal to be measured.
A and B Trigger Coupling Selector
Coupling selections for DC, AC, HF REJ, and LF REJ
are done by U421B for the A Trigger and U431B for
the B Trigger. The trigger signal path is through a
filter circuit having the proper bandpass character­
istics for the selected trigger coupling. NOISE REJ
coupling is done differently. The two Trigger LEVEL
Comparators (U421C and U431C) have selectable
hysteresis. For NOISE REJ Trigger
Sequencer U600
CPLG, the