A Sweep Start Circuit Waveforms - Tektronix 2246 1Y Service Manual

Theory of Operation—2246 1Y and 2246 Mod A Service
A and B Sweep Buffers
The A Sweep Buffer (Q310A and B, and Q312) and B
Sweep Buffer (Q323A and B, and Q325) buffer the
voltage ramp as the timing capacitors charge. In the
A Sweep circuit, Q310A and Q310B are high-
impedance FET amplifiers driving emitter follower
Q312. The output signal from the emitter of Q312 is
applied to the Delay Time Comparators, the E nd-of-
Sweep Comparators, fed back to the Baseline
Stabilizer circuit, and sent to the Horizontal Output
Amplifier (Diagram 6) as the A RAMP horizontal
deflection signal.
Sweep End Comparators
The sweep ramp signals must horizontally deflect
the electron beam across the entire face of the crt.
Comparators U316A, B, C, and D determine when
the A and B Sweeps have reached the required
amplitude. These comparators check the sweep
voltage against the reference level that defines the
end of the sweep and generate the A SWP END and
B SWP END signals when that level is reached. The
sweep-end signals are applied to the Trigger Logic
1C (U602) so that device knows when the sweeps
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Figure 3-5. A Sweep Start circuit waveforms.
are done. The Trigger Logic 1C then switches the
states of the A GATE or the B GATE signal (as
appropriate) to reset the sweep circuitry to its
baseline level.
Delay Time Comparators
When the A Sweep ramp runs, its amplitude is com­
pared against two delay levels by the comparators
of U313. The differential outputs of the REF delay
comparator change states when the A Sweep
crosses the first delay level. The differential output
signal from the delay comparator is applied to ECL
line receiver U315C. That device has a high gain and
produces a fast-rise signal at an ECL level. When
the DLY END 0 (reference delay completed) is
received by the Trigger Logic 1C (U602, Diagram 4),
a B GATE is produced to start the B Sweep in RUNS
AFTER B Trigger mode. That B Sweep displays the
applied waveform at the first (reference) delay
setting. At the end of the delay in RUNS AFTER
mode, the Trigger Logic 1C begins watching for a B
Trigger signal that must occur before a B GATE is
produced.
The differential output of the second delay com­
parator in U313 changes states when the A Sweep
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