Dc Fail; Dca / Ags / Bias Dac's - GE Medical Systems PRODIGY Service Manual

6 Unused
7 Unused

2.5.8 DC FAIL

Bit Name
0 /plus_scanner_fail
1 /plus_analog_fail
2 /minus_analog_fail
3 Unused
4 Unused
5 Unused
6 Unused
7 Unused

2.5.9 DCA / AGS / BIAS DAC's

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2-54 System Overview
N/A N/A Expansion room.
N/A N/A Expansion room.
The DC fail error register latches the status of the DC power monitors at the
time of reset. If scanner reset code indicates /dc_power_fail the firmware can
read this register to identify the specific DC source failure. The register is also
latched at the end of read cycles such that current status can be ascertained
by a double read.
R/ Def. Description
W
R N/A Loss of +24V power input.
R N/A Loss of +12V power input.
R N/A Loss of -12V power input.
N/A N/A Expansion room.
N/A N/A Expansion room.
N/A N/A Expansion room.
N/A N/A Expansion room.
N/A N/A Expansion room.
The cSBC uses a single 10 bit octal DAC, the Linear Technology LTC1660, to
generate the AGS and DAC window reference voltages and the bias program
voltage. The DAC utilizes a serial interface and as such is not accessed with a
traditional CPU write cycle. To load the device the firmware writes to the DAC
address listed above, in response to which the MAX drops the /CS line to the
device. The firmware then manipulates the local serial bus clock and data
lines to load the DAC setting. The desired DAC channel address in encoded
into the first 4 bits of the output data word. A read is then made to the DAC
address, in response to which the MAX raises the /CS line. See device data
sheet and analog section below for further DAC details.
PRODIGY Service Manual (Rev C - 2000)