Absolute Maximum Ratings; Electrical Characteristics - Renesas HD49335HNP Specification Sheet

HD49335NP/HNP

Absolute Maximum Ratings

Item
Power supply voltage
Analog input voltage
Digital input voltage
Operating temperature range
Power dissipation
Storage temperature
Power supply voltage
Note: AV , AV are analog power
DD SS
DV 1, DV 1 are digital power source systems of CDS, PGA and ADC.
DD SS
DV 2, DV 2 are buffer power source systems of ADC output.
DD SS
DV 3, DV 3 are general digital power source systems of TG.
DD SS
DV 4, DV 4 are buffer power source systems of H1 and H2.
DD SS
• Pin 2 multi bonds the DV
• When pin 64 is set to Low, pin 41 = STROB output, pin 39 = SUB_SW output
When Hi, pin 41 = Vgate input, pin 39 = ADCK input

Electrical Characteristics

• Items Common to CDSIN and ADCIN Input Modes
Item Symbol
Power supply voltage
V
range
Conversion frequency f
CLK
f
CLK
V
Digital input voltage
V
Digital output voltage V
V
Digital input current I
IH
I
IL
ADC resolution RES
ADC integral linearity INL
ADC differential linearity+ DNL+
ADC differential linearity– DNL–
Sleep current I
SLP
Standby current I
STBY
Notes: 1. Differential linearity is the calculated difference in linearity errors between adjacent codes.
2. 2 divided mode: f
3 divided mode: f
3. Values within parentheses ( ) are for reference.
Rev.1.0, Feb.12.2004, page 14 of 29
Symbol
V
DD
V
IN
V
I
Ta
Pt
Tstg
Vopr
source systems
1 and DV 2
SS SS
(Unless othewide specified, Ta = 25°C, AV
Min Typ
2.70 3.00
DD
hi 20 —
low 5.5 —
DV —
IH2 DD
2.25
3.0
0 —
IL2
DV –0.5 —
OH DD
— —
OL
— —
–50 —
10 10
— (2)
— 0.3
–0.99 –0.3
–100 0
— 3
= 1/2CLK_in
CLK
= 1/3CLK_in
CLK
Ratings
4.1
–0.3 to AV +0.3
DD
–0.3 to DV +0.3
DD
–10 to +75
750
–55 to +125
2.70 to 3.30
of CDS, PGA, and ADC.
= 3.0 V, DV
DD
Max Unit
3.30 V
36 MHz
25 MHz
DV
V
DD
DV
V
DD
0.6
3.0
— V
0.5 V
µA
50
µA
—
10 bit
— LSBp-p
0.99 LSB
— LSB
µA
100
5 mA
(Ta = 25°C)
Unit
V
V
V
°C
mW
°C
V
= 3.0 V, and R
DD BIAS
Test Conditions Remarks
2
LoPwr = low * HD49335HNP
2
LoPwr = high * HD49335NP
CS, SCK, SDATA
I = –1 mA
OH
I = +1 mA
OL
V = 3.0 V
IH
V = 0 V
IL
f = 25 MHz
CLK
f = 25 MHz *1
CLK
f = 25 MHz *1
CLK
Digital input pin is
set to 0 V, output
pin is open
Digital I/O pin is set
to 0 V
= 33 kΩ)