Crc-16 - Fuji Electric FRENIC-AQUA series User Manual

Rs-485 communication
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3.4

CRC-16

3.4.1
Overview of the CRC-16
The CRC (cyclic redundancy check) is a system to confirm whether there is any error in the
communications frame during data transmission.
The CRC is among the most effective error check systems. The transmission station calculates
and adds CRC data to the last block of the frame, and the receiving station also calculates CRC
data against the data received, and compares them with each other.
Steps to calculate CRC data
-
Divide data expressed as a polynomial (for example, 0000 0001 0000 0011 0000 0011 0000
0010 0000 0000 0001 0100, the 48-bit data shown in Section 3.4.3 "Calculation example" →
40
33
32
X
+X
+X
+X
16
15
2
X
+X
+X
+1). CRC data is the remainder (16 bits) of this division.
-
Ignore the quotient, and send a message with the remainder added to the final two
characters of the data.
-
The receiving station divides this message (with the CRC added) by the generative
polynomial expression, and considers the transmitted message to have been received
without any error if the "remainder" is 0.
CRC-16
The generative polynomial expression is expressed as a multiplier of X, such as X
place of the description of binary code 1101. Although any prime polynomial expression is
acceptable as the generative polynomial expression, some standard generative polynomial
expressions for optimizing error detection are defined and proposed. The RTU protocol uses the
generative polynomial expression (X
0000 0000 0101). In this case, the CRC generated is well known as CRC-16.
3.4.2
Algorithm
Figure 3.1 on the following page shows the algorithm for calculating CRC-16. Consult it together
with the calculation example that follows.
In this figure, the transmission station calculates CRC data and finally adds it to the
transmission frame as a check code.
The receiving station uses the same algorithm to perform a transaction. However, it collates the
CRC data it calculated with the transmitted CRC data.
25
24
17
4
2
+X
+X
+X
+X
) by a generative polynomial expression (17 bits;
16
+ X
15
2
+ X
+ 1) corresponding to binary code 1 (1000
3-20
3
2
+ X
+ 1, in

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