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Signal Description
Here is the detailed description of each signal passing through the TX25A-80P connector.
Pin No.
Signal
I/O
Description
Power and Ground
33, 34, 35, 36,
+12V~+19V
-
The Pluggable Module supports a voltage range of +12V~+19V DC IN
37, 38, 39, 40
(mandatory). The maximum total current rating shall not exceed 12A (1A
per pin). The in-rush current of the pluggable module shall not exceed
14A to ensure successful power up operation.
It is mandatory for the OPS-C manufacturers to provide a Power Rating
label on the Pluggable Module and/or product brief/catalog which
indicates the power consumption of the module (e.g. 40W). Display
manufacturers must indicate the power supply spec for OPS-C on the
product brief/catalogue (e.g. 16V/4A)
3, 6, 9, 12, 16,
GND
-
Ground
19, 22, 25,28,
32, 53, 56, 59,
62, 65, 68, 75,
76, 77, 78, 79,
80
DVI-D/TMDS
31
DVI_HPD
I
DVI Hot Plug Detect. Active High
30
DVI_DDC_CLK
I/O
Display Data Channel Signals
DVI Control Data and Clock. These are single-ended control signals used
29
DVI_DDC_DATA
for communications between the chipset DVI display port and a panel
device (Sink).
27
TMDS2+
O
TMDS Data Channel
26
TMDS2-
24
TMDS1+
23
TMDS1-
21
TMDS0+
20
TMDS0-
18
TMDS_CLK+
O
TMDS Clock Channel
17
TMDS_CLK-
DisplayPort
15
DDP_HPD
I
Display Port Hot Plug Detect. Active High
14
DDP_AUXP
I/O
Display Port Auxiliary Channel
13
DDP_AUXN
11
DDP_0P
O
Display Port Data Channel
10
DDP_0N
8
DDP_1P
7
DDP_1N
5
DDP_2P
4
DDP_2N
2
DDP_3P
1
DDP_3N
Chapter 2 Hardware Installation
Chapter 5 Ports and Connectors
Chapter 5
Audio Signals
70
AZ_LINEOUT_R
69
AZ_LINEOUT_L
USB Interface
67
USB_PP0
66
USB_PN0
64
USB_PP1
63
USB_PN1
61
USB_PP2
60
USB_PN2
58
StdA_SSTX+
57
StdA_SSTX-
55
StdA_SSRX+
54
StdA_SSRX-
UART Interface
52
UART_TXD
51
UART_RXD
OPS Control Interface
74
PWR_STATUS
73
PS_ON#
72
PB_DET
71
CEC
29
O
Audio Right Channel
Audio Left Channel
I/O
USB2.0 Differential Pair
USB3.0 SuperSpeed Transmitter Differential Pair
O
USB3.0 SuperSpeed Transmitter Differential Pair
I
USB3.0 SuperSpeed Receiver Differential Pair
O
Transmitted UART data from pluggable board, UART 3.3V LVTTL signal.
Assign as COM 1 for the UART Port in the pluggable module.
I
Received UART data for pluggable board, UART 3.3V LVTTL signal.
Assign as COM 1 for the UART Port in the pluggable module.
OC
Power status indication signal or Power Good status of the pluggable
board. This pin shall be Open Collector and pull up to +3.3V on the
docking/control board side.
High: Pluggable board power off state
Low: Pluggable board power on state
I
Pluggable Signal ON: This is meant for signal initiation to power ON or
boot up the Pluggable Module. PS_ON# shall be asserted at least 500ms
after power is delivered from PSU to the board via the JAE connector (G3
to S5 state). Pull up to +3.3V on the pluggable board.
A pulse width present on the PS_ON# shall be detected and responded
to within 200ms to ensure successful operation.
Use case: Power button initiation from the panel control board to the
Pluggable board via, for example, IR remote control ON. The PWRBTN#
pin on the Intel ICH/PCH can be utilized for this purpose. PWRBTN# has
a 16 ms of internal debounce logic.
External debouncing circuit is not required. Refer to the respective
platform design guide and chipset datasheet.
+If the pluggable board present state is S5, the transitions start as soon
as the PWRBTN# is pressed (but after the debounce logic), and does not
depend on when the Power Button is released.
+If pluggable board present state is S0-S4 and if PWRBTN# is held
low for at least four consecutive seconds, this will initiate unconditional
transition to S5 state.
O
Pluggable board detection. Output signal, recommend grounded on the
pluggable board side with pull up to +3.3V on the docking/control board
side.
High: No Pluggable
Low: Pluggable board Present
I/O
Consumer Electronics Control for Proof of Play/Display initiative. Can also
be used for display panel status detection and other control functions.
*Note that the OPS100-SH does not support the CEC function.
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