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Adaptive clocking
A technique in which a clock signal is sent out by J-Link / J-Trace. J-Link / J-Trace
waits for the returned clock before generating the next clock pulse. The technique
allows the J-Link / J-Trace interface unit to adapt to differing signal drive capabilities
and differing cable lengths.
Application Program Interface
A specification of a set of procedures, functions, data structures, and constants that
are used to interface two or more software components together.
Big-endian
Memory organization where the least significant byte of a word is at a higher address
than the most significant byte. See Little-endian.
Cache cleaning
The process of writing dirty data in a cache to main memory.
Coprocessor
An additional processor that is used for certain operations, for example, for floating-
point math calculations, signal processing, or memory management.
Dirty data
When referring to a processor data cache, data that has been written to the cache
but has not been written to main memory is referred to as dirty data. Only write-back
caches can have dirty data because a write-through cache writes data to the cache
and to main memory simultaneously. See also cache cleaning.
Dynamic Linked Library (DLL)
A collection of programs, any of which can be called when needed by an executing
program. A small program that helps a larger program communicate with a device
such as a printer or keyboard is often packaged as a DLL.
Embedded Trace Macrocell (ETM)
ETM is additional hardware provided by debuggable ARM processors to aid debugging
with trace functionality.
Embedded Trace Buffer (ETB)
ETB is a small, circular on-chip memory area where trace information is stored during
capture.
EmbeddedICE
The additional hardware provided by debuggable ARM processors to aid debugging.
Halfword
A 16-bit unit of information. Contents are taken as being an unsigned integer
unless otherwise stated.
Host
A computer which provides data and other services to another computer. Especially, a
computer providing debugging services to a target being debugged.
ICache
Instruction cache.
ICE Extension Unit
A hardware extension to the EmbeddedICE logic that provides more breakpoint units.
J-Link / J-Trace (UM08001)
CHAPTER 12
© 2004-2011 SEGGER Microcontroller GmbH & Co. KG
Glossary