Segger J-Link User Manual page 16

16
7.3.2 Tracing on Kinetis K40 and K60 devices ....................................................161
7.3.3 MAC71x ................................................................................................161
7.4 Luminary Micro ......................................................................................162
7.4.1 Unlocking LM3Sxxx devices .....................................................................163
7.4.2 Stellaris LM3S100 Series .........................................................................163
7.4.3 Stellaris LM3S300 Series .........................................................................163
7.4.4 Stellaris LM3S600 Series .........................................................................163
7.4.5 Stellaris LM3S800 Series .........................................................................163
7.4.6 Stellaris LM3S2000 Series .......................................................................163
7.4.7 Stellaris LM3S6100 Series .......................................................................163
7.4.8 Stellaris LM3S6400 Series .......................................................................163
7.4.9 Stellaris LM3S6700 Series .......................................................................163
7.4.10 Stellaris LM3S6900 Series .......................................................................163
7.5 NXP......................................................................................................164
7.5.1 LPC ......................................................................................................165
7.6 OKI ......................................................................................................167
7.6.1 ML67Q40x.............................................................................................167
7.7 Samsung ..............................................................................................168
7.8 ST Microelectronics.................................................................................169
7.8.1 STR 71x................................................................................................170
7.8.2 STR 73x................................................................................................170
7.8.3 STR 75x................................................................................................170
7.8.4 STR91x.................................................................................................170
7.8.5 STM32 ..................................................................................................170
7.9 Texas Instruments .................................................................................172
7.9.1 TMS470 ................................................................................................172
8 Target interfaces and adapters ....................................................................................173
8.1 20-pin JTAG/SWD connector ....................................................................174
8.1.1 Pinout for JTAG ......................................................................................174
8.1.2 Pinout for SWD ......................................................................................176
8.2 38-pin Mictor JTAG and Trace connector ....................................................179
8.2.1 Connecting the target board ....................................................................179
8.2.2 Pinout...................................................................................................180
8.2.3 Assignment of trace information pins between ETM architecture versions .......182
8.2.4 Trace signals .........................................................................................182
8.3 19-pin JTAG/SWD and Trace connector .....................................................184
8.3.1 Target power supply ...............................................................................185
8.4 9-pin JTAG/SWD connector......................................................................186
8.5 Adapters ...............................................................................................187
9 Background information ...............................................................................................189
9.1 JTAG ....................................................................................................190
9.1.1 Test access port (TAP) ............................................................................190
9.1.2 Data registers........................................................................................190
9.1.3 Instruction register.................................................................................190
9.1.4 The TAP controller ..................................................................................191
9.2 Embedded Trace Macrocell (ETM) .............................................................193
9.2.1 Trigger condition ....................................................................................193
9.2.2 Code tracing and data tracing ..................................................................193
9.2.3 J-Trace integration example - IAR Embedded Workbench for ARM.................193
9.3 Embedded Trace Buffer (ETB) ..................................................................197
9.4 Flash programming ................................................................................198
9.4.1 How does flash programming via J-Link / J-Trace work? ..............................198
9.4.2 Data download to RAM ............................................................................198
9.4.3 Data download via DCC...........................................................................198
9.4.4 Available options for flash programming ....................................................198
9.5 J-Link / J-Trace firmware.........................................................................200
9.5.1 Firmware update ....................................................................................200
9.5.2 Invalidating the firmware ........................................................................200
J-Link / J-Trace (UM08001) © 2004-2011 SEGGER Microcontroller GmbH & Co. KG