Segger J-Link User Manual page 15

5.4 SWD interface ....................................................................................... 105
5.4.1 SWD speed ........................................................................................... 105
5.4.2 SWO .................................................................................................... 105
5.5 Multi-core debugging ............................................................................. 107
5.5.1 How multi-core debugging works ............................................................. 107
5.5.2 Using multi-core debugging in detail ........................................................ 108
5.5.3 Things you should be aware of ................................................................ 109
5.6 Connecting multiple J-Links / J-Traces to your PC ...................................... 111
5.6.1 How does it work? ................................................................................. 111
5.6.2 Configuring multiple J-Links / J-Traces ..................................................... 112
5.6.3 Connecting to a J-Link / J-Trace with non default USB-Address .................... 113
5.7 J-Link control panel................................................................................ 114
5.7.1 Tabs .................................................................................................... 114
5.8 Reset strategies .................................................................................... 120
5.8.1 Strategies for ARM 7/9 devices ................................................................ 120
5.8.2 Strategies for Cortex-M devices ............................................................... 122
5.9 Using DCC for memory access ................................................................. 124
5.9.1 What is required? .................................................................................. 124
5.9.2 Target DCC handler ............................................................................... 124
5.9.3 Target DCC abort handler ....................................................................... 124
5.10 J-Link script files ................................................................................... 125
5.10.1 Actions that can be customized ............................................................... 125
5.10.2 Script file API functions .......................................................................... 125
5.10.3 Global DLL variables .............................................................................. 128
5.10.4 Global DLL constants.............................................................................. 130
5.10.5 Script file language ................................................................................ 131
5.10.6 Executing J-Link script files ..................................................................... 132
5.11 Command strings .................................................................................. 133
5.11.1 List of available commands ..................................................................... 133
5.11.2 Using command strings .......................................................................... 139
5.12 Switching off CPU clock during debug ....................................................... 141
5.13 Cache handling...................................................................................... 142
5.13.1 Cache coherency ................................................................................... 142
5.13.2 Cache clean area ................................................................................... 142
5.13.3 Cache handling of ARM7 cores................................................................. 142
5.13.4 Cache handling of ARM9 cores................................................................. 142
6 Flash download and flash breakpoints.........................................................................143
6.1 Introduction.......................................................................................... 144
6.2 Licensing .............................................................................................. 145
6.3 Supported devices ................................................................................. 147
6.4 Setup for different debuggers (internal flash) ............................................ 148
6.4.1 IAR Embedded Workbench ...................................................................... 148
6.4.2 Keil MDK .............................................................................................. 149
6.4.3 J-Link GDB Server ................................................................................. 151
6.4.4 J-Link RDI ............................................................................................ 151
6.5 Setup for different debuggers (CFI flash) .................................................. 152
6.5.1 IAR Embedded Workbench / Keil MDK ...................................................... 152
6.5.2 J-Link GDB Server ................................................................................. 153
6.5.3 J-Link commander ................................................................................. 153
6.5.4 J-Link RDI ............................................................................................ 153
7 Device specifics ...........................................................................................................155
7.1 Analog Devices...................................................................................... 156
7.1.1 ADuC7xxx ............................................................................................ 156
7.2 ATMEL ................................................................................................. 158
7.2.1 AT91SAM7............................................................................................ 158
7.2.2 AT91SAM9............................................................................................ 160
7.3 Freescale.............................................................................................. 161
7.3.1 Unlocking Kinetis K40 and K60 devices ..................................................... 161
J-Link / J-Trace (UM08001) © 2004-2011 SEGGER Microcontroller GmbH & Co. KG
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