Post Error Message Syntax - Sun Oracle SPARC T3-1B Service Manual

POST Error Message Syntax

POST error messages use the following syntax:
c:s > ERROR: TEST = failing-test
c:s > H/W under test = FRU
c:s > Repair Instructions: Replace items in order listed by H/W
under test above
c:s > MSG = test-error-message
c:s > END_ERROR
In this syntax, c = the core number, s = the strand number.
Warning messages use the following syntax:
WARNING: message
Informational messages use the following syntax:
INFO: message
In the following example, POST reports an uncorrectable memory error affecting
DIMM locations /SYS/MB/CMP0/BOB0/CH0/D0 and
/SYS/MB/CMP0/BOB1/CH0/D0. The error was detected by POST running on node 0,
core 7, strand 2.
2010-07-03 18:44:13.359 0:7:2>Decode of Disrupting Error Status Reg
(DESR HW Corrected)
2010-07-03 18:44:13.517 0:7:2>
(non-local) sw_recoverable_error.
2010-07-03 18:44:13.638 0:7:2>
(non-local) hw_corrected_and_cleared_error.
2010-07-03 18:44:13.773 0:7:2>
2010-07-03 18:44:13.836 0:7:2>Decode of NCU Error Status Reg bits
00000000.22000000
2010-07-03 18:44:13.958 0:7:2>
a Software Recoverable Error Request
2010-07-03 18:44:14.095 0:7:2>
issued a Hardware Corrected-and-Cleared Error Request
2010-07-03 18:44:14.248 0:7:2>
2010-07-03 18:44:14.296 0:7:2>Decode of Mem Error Status Reg Branch 1
bits 33044000.00000000
2010-07-03 18:44:14.427 0:7:2>
on an UE if VEU = 1, or VEF = 1, or higher priority error in same cycle.
2010-07-03 18:44:14.614 0:7:2>
on a CE if VEC = 1, or VEU = 1, or VEF = 1, or another error in same cycle.
42 SPARC T3-1B Server Module Service Manual • July 2012
bits 00300000.00000000
1 DESR_SOCSRE:
1 DESR_SOCHCCE:
1 NESR_MCU1SRE:
1 NESR_MCU1HCCE:
1 MEU 61
1 MEC 60
SOC
SOC
MCU1 issued
MCU1
R/W1C Set to 1
R/W1C Set to 1