Table of Contents
Advertisement
S1R72104 Technical Manual
7.3 Detailed Description of Each Register
7.3.1 Main Interrupt Status (MAININT) R/W
When the IC interrupted CPU, the CPU first reads this register for processing the interruption to get to know
which interrupt status register is the factor.
After reading this register, the CPU reads the interrupt status register corresponding to each bit to find out the
bit that is the source of interrupt, and processes the interruption appropriately. Then it writes the values read to
the interrupt status registers corresponding to each bit, then clearing the bits.
If GOOD, SABT, or DTCMP bit is the interrupt source, the CPU writes the value read to clear the bits. The
register has no need to clear directly any other bits.
7
6
5
GOOD
SABT
EXEC
BIT7 SCSI COMMAND NORMAL COMPLETE
This bit becomes HIGH if a SCSI control command closed normally.
BIT6 ABORTED SCSI COMMAND
This bit becomes HIGH if a control command was forced to terminate by Abort command issued.
BIT5 EXECUTING SCSI COMMAND
This bit is HIGH while a SCSI control command is under execution. This bit is not a factor causing interrupt to the
CPU, so HIGH of this bit causes no interruption. It is used to monitor the execution of SCSI control command.
BIT4 SCSI INTERRUPT STATUS 1
This bit becomes HIGH if any interrupt factor about the SCSI interface is shown on SCSIINT1 register.
BIT3 SCSI INTERRUPT STATUS 2
This bit becomes HIGH if any interrupt factor about the SCSI interface is shown on SCSIINT2 register.
BIT1 DMA TRANSFER COMPLETE
This bit becomes HIGH when DMA data transfer activated by DMACTL register ends.
It becomes HIGH also when the transfer is forced to terminate by "0" written in DTGO bit of DMACTL register.
It becomes HIGH also if a command is aborted by Abort_SCSI command or if a command under execution is aborted
by ATN assertion after DTGO bit of DMACTL register was set because DMA terminates.
BIT0 AUTO SEQUENCE COMPLETE
This bit becomes HIGH when AUTO1 or AUTO2 bit of SCSIMODE0(09h) is set and the command processing
specified is over.
10
4
3
2
SCSI1
SCSI2
-
1
0
00h
DTCMP
ASCMP
AUTO SEQUENCE COMPLETE
DMA TRANSFER COMPLETE
SCSI INTERRUPT STATUS 2
SCSI INTERRUPT STATUS 1
EXECUTING SCSI COMMAND
ABORTED SCSI COMMAND
SCSI COMMAND NORMAL COMPLETE
EPSON
Rev.1.1
Advertisement
Table of Contents
