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7.3.2 SCSI Interrupt Status 1 (SCSIINT1) R/W
Shows the result of a SCSI control command executed.
The CPU can recognize the interrupt source by reading this register after receiving the interrupt signal. It
clears the bit by writing again the value read.
7
6
5
SPERR
IDERR
SELTO
BIT7 SCSI DATA PARITY ERROR DETECTED
This bit becomes HIGH if a parity error was detected on SCSI data bus.
BIT6 ID ERROR DETECTED
This bit becomes HIGH if an error was detected about ID bit during the selection or reselection phase. The error
about ID bit shows that:
Only one ID bit is asserted. or,
Three or more ID bits are asserted.
BIT5 SELECTION TIME OUT
This bit becomes HIGH if time-out was detected during the selection or reselection phase.
BIT4 SCSI ATN ASSERTION DETECTED
This bit becomes HIGH if SCSI ATN was asserted. It is not set, though, in the sequence where SCSI ATN is asserted
usually, such as the message-out phase subsequent to selection.
BIT3 BUS FREE DETECTED
This bit becomes HIGH if SCSI control command detected the busfree phase during its execution.
BIT2 ILLEGAL PHASE CHANGE DETECTED
This bit becomes HIGH if a SCSI control command detected unexpected phase transition during its execution.
It is valid only in Initiator mode.
BIT1 SCAM SELECTED
This bit becomes HIGH if SCAM selection was responded to.
BIT0 SELECTED WITHOUT ATTENTION
This bit becomes HIGH if the selection which does not assert ATTENTION was responded to.
Even if this bit is set, a SCSI control command continues execution. If a command block remains received, though,
the first byte of SCSI-FIFO has the command code.
Rev.1.1
4
3
2
SATN
BFREE
ILPHS
S1R72104 Technical Manual
1
0
01h
SCSEL
WOATN
SELECTED WITHOUT ATTENTION
SCAM SELECTED
ILLEGAL PHASE CHANGE DETECTED
BUS FREE DETECTED
SCSI ATN ASSERTION DETECTED
SELECTION TIME OUT
ID ERROR DETECTED
SCSI DATA PARITY ERROR DETECTED
EPSON
11
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