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Pin No.
Symbol
CPU interface-related matters (17)
24
AD0
27
AD1
28
AD2
29
AD3
30
AD4
15
DB0
16
DB1
17
DB2
18
DB3
20
DB4
21
DB5
22
DB6
23
DB7
35
XCS
34
XINT
32
XRD
31
XWR
Others (17)
4
OSCIN
5
OSCOUT
13
TESTMON
33
XRESET
14
TESTEN
7
CLKSEL0
8
CLKSEL1
11
PLLCT0
12
PLLCT1
2
EXCLK
10
XPLLPD
9
V
C
74,83,
NC
93,99
HV
:5V (5)
DD
19,45,62,
HV
DD
72,76,80,
85,89,94,
98
LV
:3.3V (6)
DD
1,6,26,51 LV
DD
V
:0V (17)
SS
3,25,36,
V
SS
50,60,64,
67,70,75,
78,82,87,
91,96,100
Note :
I
Is
Ipu
Ispu
Rev.1.1
I/O
Ipu
Address input pin (AD0 to AD4)
Ipu/O Data pin (DB0 to DB7)
Ispu
Chip select signal for accessing internal register
Otr
Interrupt request output signal
Ispu
Data lead signal
Ispu
Data write signal
I
Input to built-in oscillation circuit (40MHz, 20MHz or
22.5MHz)
O
Output from built-in oscillation circuit
O
Monitor output for testing (open "LOW" output usually)
Ipu
System reset input signal
Ipd
Pin for testing (connected to LOW (GND) usually)
I
Input clock selection: LOW(GND): OSCIN / HIGH(LV
EXCLK input
I
System clock selection: LOW(GND): PLL output /
HIGH(LV
): Selecting signal of CLKSEL0
DD
I
Dependent on PLL operation control pin input clock; input
on 3.3V level
I
Dependent on PLL operation control pin input clock; input
on 3.3V level
I
5V level external clock input pin (connected to LOW (GND)
when not used)
I
PLL power-down pin
LOW (GND): PLL Power-down mode / HIGH (LV
operation
O
Internal V
control pin
CO
-
Not connected to IC chips (open usually)
P
Power supply for 5V interface
P
Power supply for internal operation
P
GND
: Input
: Schmitt input
: Pull-up input
: Pull-up Schmitt input
Functional description
O
: Output
Ood
: Open drain output
Otr
: Tristate output
Ipd
: Pull-down input
EPSON
S1R72104 Technical Manual
Remarks
Drive capability 3mA
Drive capability 6mA
Drive capability 2mA
):
DD
): PLL
DD
5
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