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Troubleshooting
Running Self Test
Troubleshooting Self Test 102
A self test 102 failure can be caused by a number of possible causes; A1 Power
Supply, A2 Vector, or the A3 RF Assembly. Self-test 102 is the JTAG Chain
check (Joint Test Action Group). The testing makes use of a protocol to access
a set of test registers that preset chip logic levels and device capabilities of
various parts. The protocol verifies setting in the many different FPGA, PROMs,
and individual IC's to determine the validity of each component. Instrument
"Error" messages and/or other reported self-test failures, listed under "View
Details", should be considered prior to replacing any specific hardware.
Validate all power supply DC and AC ripple voltages first by going to "A1 Power
Supply". Evaluating the specific self test failures and the power supply values
may identify the probable faulty assembly.
Troubleshooting Self Test 704
Self-test 704 validates the 100 MHz Reference clock signal that originates on
the A3 RF Assembly and is the clock pulse for the ARB FPGA on the A2 Vector
Assembly. If the 100 MHz clock is inadequate in amplitude or frequency the
cause likely originates from the A3 RF Assembly.
If self-test 704 fails, perform the following:
1. Refer to
2. Carefully remove W6 by pulling straight up at both ends of W6.
3. Inspect and verify the cable is acceptable.
4. Connect the output from the blind female MCX connector J5000 through a
Figure 1-1
W6 - J5000
Keysight X-Series Signal Generators Service Guide
Figure
1-1. Remove plastic clamp holding cable W6.
a. If the cable is considered faulty, REPLACE the cable.
10 dB attenuator (PAD) to a spectrum analyzer.
33
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Troubleshooting
