Keysight N5171B EXG Service Manual page 24

Troubleshooting
Overall Block Description
Synthesizer Circuitry
The frequency synthesis circuitry used in the X-Series are based on either a
single (EXG-B) or a triple (MXG-B) phase-locked loop (PLL) design. X-Series
uses a Frac-N synthesis FPGA to control the multiplier and divider modules.
Frequency multipliers and dividers are used to extend the basic synthesis loop
frequency range to cover 250 MHz to 6 GHz. Frequency and phase
modulations are built into the synthesizer circuitry using the Frac-N FPGA.
— The VCO tunes over a range of 750 MHz to 1.5 GHz
— The PLL operates over a range of 3.0 to 6 GHz.
— The heterodyne band provides frequencies from 10 MHz to 250 MHz and
— The Op-AMP Band provides frequencies down to 9 kHz and up to 10 MHz.
Output Power Leveling Circuitry (Automatic Leveling Control Circuitry)
The Automatic Leveling Control (ALC) loop on the A3 RF assembly provides
leveled output power. The ALC loop is a feedback control system that monitors
RF power and maintains power at a user-selected level. The RF path must
provide a minimum power level to the ALC loop for the ALC loop to work
correctly. The minimum required power is slightly higher than the
maximum-leveled power.
— In closed loop mode, ALC on, a leveled output power is obtained by
Keysight X-Series Signal Generators Service Guide
— From 250 MHz to 375 MHz, the VCO is divided by 4.
— From 375 MHz to 750 MHz, the VCO is divided by 2.
— From 750 MHz to 1500 MHz, the VCO is multiplied by 1.
— From 1500 MHz to 3000.001 MHz, the VCO is multiplied by 2.
— From 3000.001 MHz to 6000 MHz, the VCO is multiplied by 4.
operates over a VCO range of 1.0001- 1.25 GHz. The 10 MHz to 250 MHz
signal is obtained by mixing the heterodyne band with the 1 GHz LO signal
provided by the reference circuitry. The resultant IF signal is then amplified
to provide the 10 MHz to 250 MHz RF signals.
The Op-amp band is generated using direct digital synthesis (DDS). The
DDS module is implemented in the FPGA using the same 50 MHZ clock
used as a reference in the PLL. The reason it is called op-amp band is
because there is no ALC loop involved in this path. The frequencies are low
enough that op-amps are used as the amplifiers. These amplifiers have their
own feedback loop and therefore do not need an external control to keep
them level over temperature and time. There is no digital modulation in the
Op-AMP Band.
comparing a detected voltage with a reference voltage. The detected
voltage is generated by coupling off a portion of the RF output signal and
converting it to a dc voltage using detector diodes. The reference voltage is
generated using calibrated DACs. When the reference and detected levels
are not the same, the ALC integrator output ramps up or down to increase
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