Keysight N5171B EXG Service Manual page 19

Reference
100MHz
VCXO

Flexible Reference FPGA
1-50 MHz
2
N.f
PFD
REF IN R (1-50) 2
10 MHz OUT 10
10 MHz 10 MHz
Signal
OCXO
Conditioning
X2, X5
PFD
Multiplier
Chain
DAC
OCXO_TUNE
100 MHz
Synthesizer Multipliers
First Doubler / Filter
1.5 to 3.0 GHz
1.5-1.9GHz
0.75 to 1.5 GHz
x2
1.9-2.4GHz
2.4-3.0GHz
Divider / Filter
390MHz
÷N
600MHz
0.75 to 1.5 GHz
900MHz
1500MHz
50 MHz
2
Synthesizer Frac-N
100
MHz
Phase 0.75 to 1.5 GHz
Frequency
VCO
Detector
1.0 GHz
X5 X2
Loop Filter, Bandwidth
Selection & Gain
FN Loop
Compensation
Prescaler
0.75 to 1.5 GHz
Second Doubler / Filter
3.0-3.8GHz
3.0 – 6.0 GHz
0.25 to 6.0 GHz
3.8-4.8GHz
x2
Attenuator
4.8-6.0GHz
.25 to 3.0 GHz
0.25 to 1.5 GHz
2.5 – 5.0 GHz to MULTIPLIER
(Microdeck block diagram)
FM
0.75 to
1.5 GHz

FracN
FM
9kHz-3.2GHz RF Conditioning
0.25 to
3.0 GHz
Low Band
Pulse
Generator
Control
P3-1 to
J3-1 on
Microdeck
block diagram
Het Band
1GHz from Reference
J2004
PULSE
Preamp
Modulation Mux
FM Out
EXT 1
ADC
LF OUT
LF
to J11 - ALC MICROWAVE
Function
CONTROL BOARD
Generator
(Microdeck block diagram)
EXT 2
ADC
AM
DAC
Temp
Sense
TRIG 1
Sweep
Trigger
Out
Interface
Imterface
TRIG 2
SWEEP
OUT
Keysight EXG-B UW Analog –
Switched 250 MHz
1.00 to 1.25 GHz 10MHz to OP AMP Band
250MHz
9kHz to 10MHz
350MHz 350MHz
1GHz
Window
ALC_UNLEVELED_L
ALC_DET ALC_LOG_DET Comparator

_ 
Log
x5 Recp
_
+
Loop
Integrator
J7
ALC_REF_PLUS_AM ALC_LOOP_INT
 Feed Forward
Ref
DAC
TC Adj
DAC
(Microdeck block diagram)
P3-5 to J3-5
Exp AM
(Microdeck block diagram)
Log
Automatic Level Control
Linear AM
A3 RF Section
To MOD FILTER J3
J2002
(Microdeck block diagram)
9 kHz-3.2 GHz
U13
ALC Detector
Window
Comparator
ALC_MOD_I
_
Filter
+
DET_REF
ALC Detector Temp Control
J6000
from J18 -
ALC MICROWAVE
CONTROL BOARD