Mapping Physical Slot Locations To Port Locations Using Lspci; Example: Lspci -Vvv Output - Magma EB7-X8G2 User Manual

IMPORTANT ORDER OF PCI EXPRESS SLOTS
The PHYSICAL PCI Express Slots 1 – 7 are not in order when displayed in any Operating Systems
Device information.

Mapping Physical Slot locations to port locations using lspci

How do you locate your PCI Express Devices in our Magma Chassis? And how does that correspond to physical slot
locations?
Below is an example of 7 PCI Express Upstream and Downstream Ports in our Magma Chassis. This output comes from
lspci –vvv > info.txt. It has been cleaned up for this example. The Magma Chassis is located below under Bus 01. There
are 7 downstream ports on Bus 2, each port has a number starting with 2, 4, ... up to 14. The Bus number will change
depending on the Server and location of host card. Each port is associated with a physical slot number, 1 through 7.
Example: lspci –vvv Output
01:00.0 PCI bridge: Integrated Device Technology, Inc. [IDT] Device 8077 (rev 02) (prog-if 00 [Normal decode])
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 64 bytes
Bus: primary=01, secondary=02, subordinate=09, sec-latency=0
I/O behind bridge: 00002000-00008fff
Memory behind bridge: e0400000-e2bfffff
Prefetchable memory behind bridge: 00000000e2c00000-00000000e47fffff
Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
Capabilities: [40] Express (v2) Upstream Port, MSI 00
DevCap:
DevCtl:
DevSta:
LnkCap:
LnkCtl:
LnkSta:
DevCap2: Completion Timeout: Not Supported, TimeoutDis-
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-
LnkCtl2: Target Link Speed: 5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB
LnkSta2: Current De-emphasis Level: -6dB
02:00.0 PCI bridge: Integrated Device Technology, Inc. [IDT] Device 8077 (rev 02) (prog-if 00 [Normal decode])
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 64 bytes
Bus: primary=02, secondary=03, subordinate=03, sec-latency=0
I/O behind bridge: 00002000-00002fff
Memory behind bridge: e0c00000-e0ffffff
Prefetchable memory behind bridge: 00000000e2c00000-00000000e2ffffff
Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
MaxPayload 2048 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
ExtTag+ AttnBtn- AttnInd- PwrInd- RBE+ FLReset-SlotPowerLimit 75.000W
Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
MaxPayload 256 bytes, MaxReadReq 128 bytes
CorrErr+ UncorrErr- FatalErr- UnsuppReq+ AuxPwr- TransPend-
Port #0, Speed 5GT/s, Width x8, ASPM L0s L1, Latency L0 <4us, L1 <4us
ClockPM- Surprise- LLActRep- BwNot-
ASPM Disabled; Disabled- Retrain- CommClk-
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
Speed 5GT/s, Width x8, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
EB7-X8G2 | Chapter 3 Software Installation
Magma
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