Temporarily Stopping Input Signal Counting (Gate Function); High-Speed Counter Frequency Measurement - Omron CJ1M-CPU21 Operation Manual

Cj-series built-in i/o cpu units
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Built-in Inputs
High-speed counter PV
Comparison is executed
without regard to the
order of the ranges in
the table.
Interrupt task that is started.

Temporarily Stopping Input Signal Counting (Gate Function)

Restrictions

High-speed Counter Frequency Measurement

138
number. The specified interrupt task will be executed once when the high-
speed counter PV is in the range (Lower limit ≤ PV ≤ Upper limit).
• A total of 8 ranges (upper and lower limits) are registered in the compari-
son table.
• The ranges can overlap.
• A different interrupt task can be registered for each range.
• The counter PV is compared with the 8 ranges once each cycle.
• The interrupt task is executed just once when the comparison condition
goes from unmet to met.
Restrictions
When more than one comparison condition is met in a cycle, the first interrupt
task in the table will be executed in that cycle. The next interrupt task in the
table will be executed in the next cycle.
Upper limit 1
Lower limit 1
Upper limit 2
Lower limit 2
No. 255
No. 000
Note The range comparison table can be used without starting an interrupt task
when the comparison condition is met. The range comparison function can be
useful when you just want to know whether or not the high-speed counter PV
is within a particular range.
Use the Range Comparison Condition Met Flags (A27400 to A27407 and
A27500 to A27507) to determine whether the high-speed counter PV is within
a registered range.
If the High-speed Counter Gate Bit is turned ON, the high-speed counter will
not count even if pulse inputs are received and the counter PV will be main-
tained at its current value. The High-speed Counter 0 Gate Bit is A53102 and
the High-speed Counter 1 Gate Bit is A53103.
When the High-speed Counter Gate Bit is turned OFF again, the high-speed
counter will resume counting and the counter PV will be refreshed.
• The Gate Bit will be disabled if the high-speed counter's reset method is
set to Phase-Z signal + Software reset and the Reset Bit is ON (waiting
for the phase-Z input to reset the counter PV.)
This function measures the frequency of the high-speed counter (input
pulses.)
The input pulse frequency can be read by executing the PRV(881) instruction.
The measured frequency is output in 8-digit hexadecimal and expressed in
Hz. The frequency measurement function can be used with high-speed
counter 0 only.
Time
No. 000
No. 255
Section 6-1
Comparison table
Upper limit 1
Lower limit 1
Interrupt task = 000
Upper limit 2
Lower limit 2
Interrupt task = 255

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