Zxr10 Ger08 Smp - Zte ZXR10 GER User Manual

Buttons SMNP board contains two buttons. Their functions are listed in
Table 10.
T

ZXR10 GER08 SMP

Definition ZXR10 GER02/04 core part is SMP. This consists of central
processor module, switching module and network processor
module. Central processor module and switching module are
fixed on the SMP, while the (SNP) is designed in the stackable
mode, so that it can be configured and adjusted in position on
actual requirements.
Central processor module implements functions of protocol
Central
processing and control processing. This is implemented by the
processor
module high-speed
processing system, Host Bridge, CACHE system, memory system
and BOOTROM. Symmetric processing system consists of two
high-performance RISC processors. Standard PCI bus connects
these
between them is up to 1Gbps.
Standard MIPS Central processor module provides a standard MIPS bus
Bus interface and a control bus interface externally. Network
processor module uses MIPS bus interface to connect the local
channel through protocol processor module that sends and
receive data packets. Each MIPS bus interface can connect
maximum of two network processor modules. Control buses
connect the control channels of other modules to realize the
initialization configuration and operation administration for all
the modules of the whole system.
Switching Forwarding core of entire ZXR10 GER system is switching
module network. ZXR10 GER switching network chip provides eight
completely independent switching channels, with the switching
bandwidth of full duplex 1.6Gbps for each channel. Single
switching network chip contains the capacity of full duplex
12.8Gbps. Unified bus connects network processor and switching
channels through unified bus. CROSSBAR structure completes
free exchange of packets, which is composed of switching
channels.
1 0 S B
A B L E M N P U T T O N S
Buttons Function Description
If SMNP master board reset button is pressed in the
presence of SMNP slave, master/slave SMNP switchover
RST will occur. If there is no slave SMNP, then equipment
will be reset. If SMNP slave has RST button, SMNP slave
will be reset.
Using EXCH button, SMNP board master/slave switches
EXCH over master/slave function. There is no response if this
button presses on SMNP slave.
MIPS
two processors
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Chapter 3 Structure and Principles
F
U N C T I O N S
processor. This consists
and the communication
of symmetric
bandwidth
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