Philips DVDR615 Service Manual page 112

Circuit Diagrams and PWB Layouts
FEBE: BE Flash, EEPROM & SDRAM
1 2 3
A
SDRAM_DATA(31:0)
SDRAM_ADDR(14:0)
{CAS(0),DQM(0),DQM(1),DQM(2),DQM(3),RAS(0),WE(0),CKE,HSCKB}
PCI_AD(31:0)
PCI_AD(31:0)
{SCL1,SDA1}
B
{SCL0,SDA0}
C
D
I903
E 2917
100n
Φ
I905
(8Kx8)
7
WC
EEPROM
SCL1 3915 6
SCL
100R
ADR
SDA1 3916 5
SDA
100R
3917
F
2K2 DEVICE
MPIO19_CTL_SERVICE
CHRY BOOT
I904
2918
100n
G
Φ
(8Kx8)
7
WC
EEPROM
SCL0 3919 6
SCL
100R
ADR
SDA0 3920 5
SDA
100R
DEVICE
APPLICATION
H
I
1 2 3
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DVDR615/69
4 5 6
+3V3dig VDD_NOR
I900
5902
2900
*
100n
7900
AM29DL640G-70EI
ROM
PCI_AD(24) 29 25
0 (8Mx8) 0
PCI_AD(25) 31 24
1 1
PCI_AD(26) 33 (4Mx16) 23
2 2
PCI_AD(27) 35 22
[FLASH]
3 3
PCI_AD(28)
38 D 21
4 4
PCI_AD(29)
40 20
5 5
PCI_AD(30)
42 19
6 6
PCI_AD(31)
44 18
7 7
8
8
3903-1 1 8 10K 30 7
8 9
2 7 32 6
3903-2 10K
9 A 10
3903-3 3 6 34 5
10K
10 11
4 5 10K 36 4
3903-4
11 12
3904-2 2 7 10K 39 D 3
12 13
3904-3 3 6 10K 41 2
13 14
3904-4 4 5 10K 43 1
14 15
PCI_AD(0)
45 48
15 16
17
A-1 17
16
18
4901 15 9
BY 19
XIO_ACK
10
RY 20
OPTION
13 4900
21
*
14
WP
NOR
ACC
26
CE XIO_SEL0
28
OE PCI_CBE(2)
47
5903 BYTE
11 4925
+3V3dig WE
12
RES F901
7904
M24C64-WMN6
1
0
2
1
3
2
{IDE_DMARQ,IDE_DIOWn,IDE_DIORn,IDE_IORDY,IDE_DMACKn,IDE_IRQ,IDE_DA1,IDE_DA0,IDE_DA2,IDE_CS0n,IDE_CS1n,IDE_DASP,RESET_IDEn,IDE_DIAGN}
5904
* MEMORY TABLE
+3V3dig
7905
M24C64-WMN6 3104 128 0927
3104 128 0929
ITEM &
3104 128 0928
1
0
2 PRESENT
4900 OPTION
1
3
2
AM29DL324 AM29DL640
7900
MT48LC8M16 MT48LC16M16
7902
7903
" "
4 5 6
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7. EN 112
7 8 9
+3V3dig
I901
2901 100n
2905 100n
PCI_AD(1) 2909 100n
PCI_AD(2)
PCI_AD(3)
PCI_AD(4)
PCI_AD(5)
*
PCI_AD(6)
7902
PCI_AD(7)
MT48LC16M16A2
PCI_AD(8)
Φ
VDD
PCI_AD(9)
SDRAM_ADDR(0) 23
0
PCI_AD(10)
SDRAM_ADDR(1) 24 DRAM
1
PCI_AD(11)
SDRAM_ADDR(2) 25
2
PCI_AD(12) SDRAM_ADDR(3) 26
3
4M X 16 X 4
PCI_AD(13) SDRAM_ADDR(4) 29
4
PCI_AD(14) SDRAM_ADDR(5)
30
5 0
PCI_AD(15) SDRAM_ADDR(6)
31
A
6
PCI_AD(16) 4M-1
SDRAM_ADDR(7) 32
+3V3dig 7
PCI_AD(17)
SDRAM_ADDR(8) 33
8
PCI_AD(18)
SDRAM_ADDR(9) 34
9
PCI_AD(19)
SDRAM_ADDR(10) 22
10
PCI_AD(20)
SDRAM_ADDR(11) 35
11
PCI_AD(21)
SDRAM_ADDR(12) 36
12
PCI_AD(22)
SDRAM_ADDR(14) 20
0
SDRAM_ADDR(13) 21 BA
1
2915 38
CLK
10p 37
CKE
OPTION
19
CS
3912 18
RAS
PCI_CBE(1)
HSCKB 17
CAS
CKE
16
WE
RAS(0)
+3V3dig
CAS(0)
VSS
WE(0)
4902
PNX7100_RESETn
IDE_DD(0:15)
RESET_IDEn
7 8 9
10 11 12
+3V3dig
I902
2902 100n
2903 100n
2906 100n
2907 100n
2910 100n
2911 100n
2913 100n
*
7903
MT48LC16M16A2
Φ
VDDQ VDD
SDRAM_ADDR(0) 23
0
40 SDRAM_ADDR(1) 24 DRAM
NC 1
SDRAM_ADDR(2) 25
2
SDRAM_ADDR(3) 26
3
4M X 16 X 4
SDRAM_ADDR(4) 29
4
SDRAM_ADDR(5)
30
5 0
SDRAM_ADDR(6)
2 SDRAM_DATA(16) 31
A
0 6
4M-1
4 SDRAM_DATA(17) SDRAM_ADDR(7) 32
1 7
5 SDRAM_DATA(18) SDRAM_ADDR(8) 33
2 8
7 SDRAM_DATA(19) SDRAM_ADDR(9) 34
3 9
8 SDRAM_DATA(20) SDRAM_ADDR(10) 22
4 10
10 SDRAM_DATA(21) SDRAM_ADDR(11) 35
5 11
11 SDRAM_DATA(22) SDRAM_ADDR(12) 36
6 12
SDRAM_DATA(23)
13
D 7
SDRAM_DATA(24)
42
8
SDRAM_ADDR(14)
44 SDRAM_DATA(25) 20
9 0
45 SDRAM_DATA(26) SDRAM_ADDR(13) 21 BA
10 1
47 SDRAM_DATA(27)
11
48 SDRAM_DATA(28) 2916 38
12 CLK
50 SDRAM_DATA(29) 10p 37
13 OPTION CKE
51 SDRAM_DATA(30) 19
14 CS
53 SDRAM_DATA(31) 3913 18
15 RAS
HSCKB 17
CAS
CKE
16
WE
DQM(3) RAS(0)
39
H
DQM 15 DQM(2) CAS(0)
VSSQ L VSS
WE(0)
1921
EDGE CONNECTOR
TOP BOTTOM
B1 A1
-5Vdig B1 A1
B2 A2
IDE_DD(5)
B2 A2 RESETn
B3 A3
IDE_DD(4)
B3 A3
B4 A4
IDE_DD(11)
B4 A4
A5
B5
B5 A5 +5Vdig
IDE_DD(7)
IDE_DD(8) B6 A6
B6 A6
IDE_DD(6)
B7 A7
IDE_DD(9)
B7 A7
IDE_DD(3)
B8 A8
IDE_DD(12)
B8 A8
B9 A9 IDE_DD(2)
IDE_DD(13)
B9 A9
IDE_DMARQ B10 A10
B10 A10
IDE_DA1 B11 A11
B11 A11
B12 A12
IDE_DD(1)
B12 A12
B13 A13
IDE_DA2
B13 A13
IDE_DD(15)
IDE_IORDY B14 A14
B14 A14
IDE_DD(14)
IDE_CS0n B15 A15
B15 A15
IDE_DD(0)
IDE_CS1n B16 A16
B16 A16
B17 A17
IDE_DA0
B17 A17
B18 A18
+5VS B18 A18 +3V3dig
B19 A19
+12Vdig B19 A19 +3V3dig
B20 A20 F849
+12VS B20 A20
10 11 12
13 14
1921 F12
2900 C5
2901 C9
2902 C10
2903 C12
2904 C13
2905 C9
2906 C10
2907 C12
2908 C13
2909 C9
A
2910 C10
2911 C12
2912 C13
2913 C10
2914 C13
2915 E8
2916 E11
2917 E3
2918 G3
2921 G10
3903-1 D4
B 3903-2 D4
3903-3 D4
3903-4 D4
3904-2 D4
3904-3 D4
3904-4 D4
3908 D7
3911 E7
3912 E8
2904 100n
3913 E11
3914 F7
2908 100n
3915 F2
2912 100n C
3916 F2
3917 F2
2914 100n
3918 F2
3919 G2
3920 H2
4900 D6
VDDQ
4901 D4
40
4902 F7
NC
4925 E6
5900 B10
5901 B13
SDRAM_DATA(0)
2 5902 B5
0 D
4 SDRAM_DATA(1)
5903 E3
1
5 SDRAM_DATA(2)
2 5904 G3
7 SDRAM_DATA(3)
3
7900 C6
8 SDRAM_DATA(4)
4
10 SDRAM_DATA(5) 7902 C9
5
11 SDRAM_DATA(6)
7903 C12
6
SDRAM_DATA(7)
13
D 7 7904 E3
SDRAM_DATA(8)
42
8 7905 G3
44 SDRAM_DATA(9)
9 F849 I12
45 SDRAM_DATA(10)
10
F901 E6
47 SDRAM_DATA(11)
11
48 SDRAM_DATA(12) I900 B5
12
50 SDRAM_DATA(13)
I901 B9
13
51 SDRAM_DATA(14)
14 I902 B12
E
53 SDRAM_DATA(15)
15
I903 E3
I904 G3
DQM(1)
39 I905 E2
H
DQM 15 DQM(0)
VSSQ L
F
IDE_DD(10)
G
H
IDE_DIOWn
IDE_DIORn
IDE_IRQ
IDE_DMACKn
I
TR20042_001.eps
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