Intel iSBC 80 Hardware Reference Manual page 61

Intel isbc 80/30 single board computer hardware reference manual
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iSBC 80/30
Operation
Auto-Rotating
Priority Mode
Specific Rotating
Priority Mode
Interrupt Request
Register (IRR)
Status
In-Service
Register (ISR)
Status
Programming Information
Table 3-19. PIC Operation Procedures
Procedure
To set:
In OCW2, write a Rotate Priority at EOI command (AOH) to 08.
Terminate interrupt and rotate priority:
In OCW2, write EOI command (20H) to 08.
To set:
In OCW2, write a Rotate Priority at SEOI command in the following format to 08:
I
07
1
06
1
05
1
04
1
03 1 02
I
01
I
00
I
1
1
1
0
0
,"L~.
I
BCOof IR line to be reset and/or put into lowest priority.
To terminate interrupt and rotate priority:
In OCW2, write an SEOI command in the following format to 08.
I
07
I
06
I
05
I
04
I
03
I
02
I
01
I
00
1
o
o
o
L2
L1
LO
. . . . . . ---y--""
I
BCO of ISR flip-flop to be reset.
To rotate priority without EOI:
In OCW2, write a command word in the following format to 08.
I
07
1
06
I
05
I
04
I
03
I
02
I
01
I
00
I
o
o
o
"L2
L 1
LO ,
r r
-------------------------~~y~----~
BCO of bottom priority IR line.
The IRR stores a "1" in the associated bit for each IR input line that is requesting
an interrupt. To read the IRR (refer to footnote):
(1) Write OBH to 08.
(2) Read 08. Status format is as follows:
1
07
1
06
1
05
1
04
1
03
1
02
I
01
I
00
I
IR Line:
7
6
5
4
3
2
1
0
The ISR stores a "1" in the associated bit for priority inputs that are being serviced.
The ISR is updated when an EOI command is issued. To read the ISR (refer
to footnote):
(1) Write OAH to 08.
(2) Read 08. Status format is as follows:
I
07
1
06
1
05
1
04
1
03
1
02
1
01
1
001
IR Line:
7
6
5
4
3
2
1
0
Be sure to reset ISR bit at end-of-interrupt when in the following modes:
Auto-Rotating (both types) and Special Mask. To reset ISR in OCW2, write:
I
07
1
06
I
05
I
04
1
03
I
02 1 01
1
00 1
0
1
1
0
0
L2
L1
LO
"
. "
-y-
-
I,
BCO identifies bit to be reset.
3-19

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