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Intel Manuals
Motherboard
iSBC 80
Hardware reference manual
Intel iSBC 80 Hardware Reference Manual
Intel isbc 80/30 single board computer hardware reference manual
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Contents
Table of Contents
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Table of Contents
Table of Contents
Chapter 1 General Information
Introduction
Description
System Software Development
Equipment Supplied
Equipment Required
Specifications
Chapter 2
Preparation for Use
Introduction
Unpacking and Inspection
Installation Considerations
User-Furnished Components
Power Requirements
Cooling Requirement
Physical Dimensions
ROM/EPROM Chips
Universal Peripheral Interface
Line Drivers and I/O Terminators
Rise Time/Noise Capacitors
Jumper Configuration
ROM/EPROM Configuration
On-Board RAM Addresses
On-Board 8085A Access
System Access
Priority Interrupts
8251A Port Configuration
Multibus Configuration
Signal Characteristics
Serial Priority Resolution
Parallel Priority Resolution
Power Fail/Memory Protect Configuration
Parallel I/Ocabling
Serial I/Ocabling
Board Installation
Programming Information
Introduction
Failsafe Timer
Memory Addressing
I/O Addressing
System Initialization
8251A USART Programming
Mode Instruction Format
Sync Characters
Command Instruction Format
Reset
Addressing
Initialization
Data Input/Output
Operation
Status Read
8253 PIT Programming
Mode Control Word and Count
Addressing
Initialization
Counter Read
Operation
Interrupt Timer
Rate Generator/Interval Timer
8255A PPI Programming
Control Word Format
Addressing
Initialization
Operation
Read Operation
Write Operation
8259A PIC Programming
Fully Nested Mode
Interrupt Priority Modes
Auto-Rotating Mode
Initialization Command Words
Interrupt Mask
Specific Rotating Mode
Status Read
Operation Command Words
Addressing
Initialization
Operation
8041/8741A UPI Programming
Interrupt Handling
TRAP Input
INTR Input
RST 7.5, 6.5, 5.5 Inputs
Principles of Operation
Introduction
Functional Description
Central Processor Unit
Clock Circuits
Interval Timer
Parallel I/O
Serial I/O
Bus Interface
Dual-Port Control
Interrupt Control
RAM Configuration
ROM/EPROM Configuration
Universal Peripheral Interface
Circuit Analysis
Initialization
Clock Circuits
Instruction Timing
Opcode Fetch Timing
Memory Read Timing
I/O Read Timing
Memory Write Timing
I/O Write Timing
Address Bus
Bus Time out
Data Bus
Read/Write Signal Generation
I/O Control Signals
Memory Control Signals
Dual Port Control Logic
Appendix a
Bus Access Timing
CPU Access Timing
Appendix B
Multibus Interface
I/O Operation
On-Board I/O Operation
System I/O Operation
ROM/EPROM Operation
RAM Operation
Bus Read/Write Operation
RAM Controller
Interrupt Operation
Chapter 5 Service Information
Introduction
Replaceable Parts
Service Diagrams
Service and Repair Assistance
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iSBC 80/30
SINGLE BOARD COMPUTER
HARDWARE
REFERENCE MANUAL
Manual Order Number: 9800611 A
l
Copyrightf 1978 Intel Corporation
I
Intel Corporation. 3065 Bowers Avenue, Santa Clara, California 95051
I
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Isbc 30
Isbc 80/30
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