Mode Control Word And Count - Intel iSBC 80 Hardware Reference Manual

Intel isbc 80/30 single board computer hardware reference manual
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iSBC 80/30
Programming Information
DO
I
DSR
I
SYNDET
I
FE
I
DE
I
PE
I
TXE
I
RSRDY
I
TXRDY
I
I
L-
OVERRUN ERROR
~
TRANSMITTER READY
The DE flag Is set when the CPU does
Indicates USART Is ready to accept a
not read a character before the next
data character or command.
one becomes available. It Is reset by
the ER bit of the Command Instruction.
DE does not Inhibit operation of the
RECEIVER READY
8251; however, the previously overrun
character Is lost.
' - - -
Indicates USART has received a char·
acter on Its serial Input and Is ready
to transfer It to the CPU.
FRAMING ERROR (ASYNC ONLY)
FE flag Is set when a valid stop bit Is not
TRANSMITTER EMPTY
detected at end of every character. It Is
Indicates that parallel to serial con·
Is reset by ER bit 01 Command Instruc·
verter In transmitter Is empty.
tlon. FE does not Inhibit operaton 01
8251.
PARITY ERROR
PE flag Is set when a parity error Is
SYNC DETECT
detected. It Is reset by ER bit 01 Com·
When set forlntemal sync detect, Indl·
mand Instruction. PE does not Inhibit
cates that character sync has been
operation of 8251.
achieved and 8251 Is ready for data.
DATA SET READY
DSR Is general purpose. Normally
used to test modem conditions such as
Data Set Ready.
450·14
Figure 3-7. USART Status Read Format
Table 3-6. Typical USART Status Read Subroutine
;STAT READS STATUS FROM USART.
;USES-NOTHING; DESTROYS-A.
; STAT
IN
RET
END
OED
3-17. MODE CONTROL WORD AND COUNT
All three counters must be initialized separately prior to
their use. The initialization for each counter consists of
two steps:
a.
A mode control word (figure 3 -8) is written to the
control register for each individual counter.
b.
A down-count number is loaded into each counter;
number is in one or two 8-bit bytes as determined by
mode control word.
;GET STATUS
The mode control word (figure 3 -8) does the following:
a.
Selects counter to be loaded.
b.
Selects counter operating mode.
c.
Selects one of the following four counter read/load
functions:
(1)
Counter latch (for stable read operation).
(2) Read or load most-significant byte only.
(3) Read or load least-significant byte only.
(4) Read or load least-significant byte first, then
most-significant byte.
d.
Sets counter for either binary or BCD count.
3-7

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