Table Of Contents - Intel iSBC 80 Hardware Reference Manual

CHAPTER 1
GENERAL INFORMATION
PAGE
Introduction .............. : . . . . . . . . . . . . . . . . . . . . .. 1-1
Description ..................................... 1-1
System Software Development .............. ' ....... 1-3
Equipment Supplied . . . . . . . . . . . . ... . . . . . . . . . . . . . . .. 1-4
Equipment Required . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 1-4
Specifications ................................... 1-4
CHAPTER 2
PREPARATION FOR USE
Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 2-1
Unpacking and Inspection ......................... 2-1
Installation Considerations . . . . . . . . . . . . . . . . . . . . . . . .. 2-1
User-Furnished Components ..................... 2-1
Power Requirements. . . . . . . . . . . . . . . . . . . . . . . . . . .. 2-1
Cooling Requirement .. . . . . . . . . . . . . . . . . . . . . . . . .. 2-1
Physical Dimensions ............................ 2-1
Component Installation ............................ 2-3
ROM/EPROM Chips ........................... 2-3
Universal Peripheral Interface .................... 2-4
Line Drivers and I/O Terminators . . . . . . . . . . . . . . . .. 2-4
Rise Time/Noise Capacitors ...................... 2-4
Jumper Configuration. . . . . . . . . . . . . . . . . . . . . . . . . . . .. 2-4
ROM/EPROM Configuration ..................... 2-4
On-Board RAM Addresses ...................... 2-4
On-Board 8085A Access ...................... 2-7
System Access .............................. 2-7
Priority Interrupts .............................. 2-8
8251A Port Configuration ....................... 2-12
8255A Port Configuration ....................... 2-12
8041/8741A Port Configuration ................... 2-12
Multibus Configuration ........................... 2-15
Signal Characteristics ........................... 2-15
Serial Priority Resolution ........................ 2-23
Parallel Priority Resolution ...................... 2-24
Power Fail/Memory Protect Configuration ............ 2-24
Parallel I/O Cabling .............................. 2-27
Serial I/O Cabling ................................ 2-27
Board Installation ................................ 2-29
CHAPTER 3
PROGRAMMING INFORMATION
Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 3-1
Failsafe Timer. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 3-1
Memory Addressing .............................. 3-1
I/O Addressing .................................. 3-2
System Initialization .............................. 3-2
8251A USART Programming ...................... 3-3
Mode Instruction Format ........................ 3-3
Sync Characters ............................... 3-3
Command Instruction Format .................... 3-3
Reset ........................................ 3-4
Addressing ................................... 3-4
Initialization .................................. 3-4
iv
CONTENTS
PAGE
Operation ..................................... 3-5
Data Input/Output ............................ 3-5
Status Read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 3-6
8253 PIT Programming ........................... 3-6
Mode Control Word and Count ................... 3-7
Addressing ................................... 3-10
Initialization .................................. 3-10
Operation ..................................... 3-11
Counter Read ............................... 3-11
Clock Frequency/Divide Ratio Selection .......... 3-11
Rate Generator/Interval Timer .................. 3-12
Interrupt Timer .............................. 3-12
8255A PPI Programming .......................... 3-13
Control Word Format ........................... 3-13
Addressing ................................... 3-14
Initialization .................................. 3 -14
Operation ..................................... 3-14
Read Operation .............................. 3-14
Write Operation ............................. 3-14
8259A PIC Programming .......................... 3-14
Interrupt Priority Modes ......................... 3-14
Fully Nested Mode ........................... 3-14
Auto-Rotating Mode .......................... 3-15
Specific Rotating Mode ....................... 3-15
Interrupt Mask ................................ 3-15
Status Read ................................... 3-15
Initialization Command Words ................... 3-15
Operation Command Words ...................... 3-16
Addressing ................................... 3-16
Initialization .................................. 3 -16
Operation ..................................... 3-16
8041/8741A UPI Programming ..................... 3-17
Interrupt Handling ............................... 3-22
TRAP Input ................................... 3-22
RST 7.5, 6.5, 5.5 Inputs ........................ 3-23
INTR Input ................................... 3 -23
CHAPTER 4
PRINCIPLES OF OPERATION
Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 4-1
Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . .. 4-1
Clock Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 4-1
Central Processor Unit . . . . . . . . . . . . . . . . . . . . . . . . .. 4-1
Interval Timer. . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . .. 4-1
Serial I/O . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 4-1
Parallel I/O . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 4-1
Universal Peripheral Interface .. . . . . . . . . . . . . . . . . .. 4-2
Interrupt Control. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 4-2
ROM/EPROM Configuration. . . . . . . . . . . . . . . . . . . .. 4-2
RAM Configuration ............................ 4-2
Bus Interface .................................. 4-2
Dual-Port Control .............................. 4-2
Circuit Analysis ................... ' ............. ; .... '. 4-2