Rom/Eprom Chips - Intel iSBC 80 Hardware Reference Manual

Preparation for Use iSBC 80/30
Table 2-1. User-Furnished and Installed Components
Item
Item Description
Use
No.
1
iSBC 604 Modular Backplane and Cardcage. In-
Provides power input pins and Multibus
cludes four slots with bus terminators.
signal interface between iSBC 80/30 and
{See figure 5-3.}
three additional boards in a multiple board
system.
2 iSBC 614 Modular Backplane and Cardcage. In-
Provides four-slot extension of iSBC 604.
cludes four slots without bus terminators.
{See figure 5-4.}
3
Connector
See Multibus connector details in Power inputs and Multibus signal interface
{mates with P1} table 2-2.
Not required if iSBC 80/30 is installed in
in an iSBC 604/q14.
4
Connector See Auxiliary connector details in
Auxiliary backup battery inputs and asso-
{mates with P2} table 2-2.
ciated memory protect functions.
5 Connector
See parallel I/O connector details in
Interfaces parallel I/O ports to Intel 8255A
{mates with J1} table 2-2.
Programmable Peripheral Interface {PPI}.
6 Connector See parallel I/O connector details in
Interfaces I/O ports to optional Intel 8041/
{mates with J2} table 2-2.
8741A Universal Peripheral Interface
{UPI}.
7
Connector See serial I/O connector details in
Interfaces serial I/O port to Intel. 8251A
{mates with J3} table 2-2.
Programmable Communications Interface
{USART}.
8 ROM/EPROM Chips One or two each of the following Intel
On-board UV erasable PROM for program
ROM/EPROM chips:
development and/or dedicated program
use. Compatible ROM chips can also be
ROM EPROM
BITS employed. Use either ROM or EPROM;
do not mix.
8308 2708
1K
x
8
-
2758
1K
x
8
2316E 2716
2K
x
8
2332
-
4K
x
8
9 Intel 8041/8741 A
Universal Peripheral Interface {UPI}.
Single chip microcomputer with program
memory, data memory, CPU, event
timer, I/O, and clock oscillator. Inter-
faces two 8-bit I/O ports; two additional
input bits {TO and T1} for conditional
branch and event timer functions.
10
Line Drivers Type Current
Used for interface to Intel 8255A and
optional Intel 8041/8741. Requires two
SN74031,OC 16 rnA
line driver IC's for each 8-bit parallel
SN7400 I 16 rnA
output port. {Exception: refer to para-
SN7408 NI 16 rnA
graph 2-11.}
SN7409 NI, OC
16 rnA
Types selected as typical; I
=
invert-
ing, NI
=
noninverting, and OC
=
open
collector.
11 I/O Terminators Intel iSBC 901 Divider or iSBC 902 Used for interface to Intel 8255A and
Pull-Up:
optional Intel 8041/8741A. Requires two
~
901 's or two 902's for each 8-bit parallel
220
input port. {Exception: refer to paragraph
iSBC 901
2-11.} Additional 901 or 902 required for
330 8041/8741 if TO and T1 inputs are used
iSBC 902
l~~v
for conditional branch or event timer
0
0
functions.
12 Capacitors Seven capacitors as required.
Rise time/noise capacitors for serial I/O
port.
2-2