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Programming Information
iSBC 80/30
Table 3-4. Typical USART Data Character Read Subroutine
;RX1 READS DATA CHARACTER FROM USART.
;USES-STAT; DESTROYS-A,FLAGS.
EXTRN STAT
RX1:
CALL
ANI
JZ
IN
RET
END
STAT
2
RX1
OEC
;CHECK FOR RXRDY
;ENTER HERE IF RXRDY IS TRUE
Table 3·5. Typical USART Data Character Write Subroutine
;TX1 WRITES DATA CHARACTER FROM REG A TO USART.
;USES-STAT; DESTROYS-A,FLAGS.
EXTRN STAT
TX1:
PUSH
PSW
TX11:
CALL
STAT
ANI
1
JZ
TX11
POP
PSW
OUT
OEC
RET
END
USART is ready to accept a data character for transmis-
sion. TXRDY is automatically reset when the CPU loads
a character into the USART.
Similarly, during normal receive operation, the USART
generates a Receive Ready (RXRDY) signal that indicates
that a character has been received and is ready for input to
the CPU. RXRDY is automatkally reset when a character
is read by the CPU.
The TXRDY and RXRDY outputs of the USART are
available at the priority interrupt jumper matrix. If, for
instance, TXRDY and RXRDY are input to the 8259A
PIC, the PIC resolves the priority af.l.d drives the INTR
input high to the CPU. TXRDY and RXRDY are also
available in the status word. (Refer to paragraph 3-15.)
3·15. STATUS READ.
The CPU can determine the
status of the serial
Va
port by issuing an
Va
Read Com-
mand to the upper address (ED or EF) of the US ART chip.
The format of the status word is shown in figure 3 -7. A
typical status read subroutine is given in table 3 -6.
3-6
;SAVE DATA
;CHECK FOR TXRDY
;ENTER HERE IFTXRDY IS TRUE
3-16. 8253 PIT PROGRAMMING
A 22.1184 -MHz crystal oscillator supplies the basic clock
frequency for the programmable chips. This clock fre-
quency is divided by 9, 18, and 144 to produce three
Jumper-selectable clocks: 2.4576 MHz, 1.2288 MHz,
and 153.6 kHz.
Thes~
clocks are available for input to
Counter 0, Counter 1, and Counter 2 of the 8253 PIT. The
default (factory connected) and optional jumpers for
selecting the clock inputs to the three counters are listed in
table 2-4.
Default jumpers connect the output of Counter 2 to the
TXC and RXC inputs of the 8251A USART. Jumpers are
included so that Counters
°
and 1 can provide real-time
interrupts or provide an event clock to the 8041/8741 UPI
and a count out clock to 8255A PPI Port EA
Va
driver.
Before programming the 8253 PIT, ascertain the input
clock frequency and the output function of each of the
three counters. These factors are determined and estab-
lished by the user during the installation.
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