Table of Contents
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Preparation for Use
iSBC 80/30
2-21. 8251A PORT CONFIGURATION
Table 2-10 lists the signals, signal functions, and the
jumpers required (if necessary) to input or output a par-
ticular signal to or from the serial I/O port (Intel 8251A
Programmable Communication Interface).
individual requirement. Recommended line drivers and
I/O terminators for user applications are listed in table
2-1.
2-23. 8041/8741A PORT CONFIGURATION
The optional Intel 8041/8741A Universal Peripheral
Interface can be programmed and, hence, configured to
perform serial or parallel I/O functions. Refer to figure 5 -2
sheet 5 for jumper details. Applications for the 8041/8741
are presented in the Intel UPI-41 User's Manual, Order
No. 9800504.
2-22. 8255A PORT CONFIGURATION
Table
2··/
1 lists the jumper configuration for three parallel
I/O ports. Note that each of the three ports (E8, E9, and
EA) can be configured in a variety of ways to suit the
Table 2-10. Connector J3
~in
Assignments Vs. Jumper Configuration
Pin
1
Sigoal
Function
Jumper In
2
PROTECTIVE GND
Protective Ground
69-70
3
TRANS SIG ElE TIMING (IN)
8251A TXC in (Note 2)
56-57
4
TRANSMITTED DATA
8251A RXD in or
*82-83
8251A TXD out
81-82
5
SEC REC DATA
8255A STXD ouP or
76-79, 73-71
8741A RS232 out
4
76-79, 73-74
6
RECEIVED DATA
8251A TXD out or
*80-81
8251A RXD in
80-83
7
REC SIG ElE TIMING
8251A RXC in (Note 2)
59-60
8
REQUEST TO SEND
8251A CTS in (Note 5)
-
-
(Note 5)
8251A RTS out to CTS in
67-68
10
CLEAR TO SEND
8251A RTS out (Note 5)
-
-
(Note 5)
8251A RTS out to CTS in
67-68
12
DATA SET READY
8251A DTR out
-
13
DATA TERMINAL ROY
8251A DSR in
-
14
GND
Ground
-
16
REG LINE SIG DET
8255A Carrier Detect in
3
-
17
RING INDICATOR
8255A Ring Indicator in
3
-
19
-12V
-12Vout
64-65
21
TRANS SIG ElETIMING (OUT)
Same as 8251A TXC in
76-75, 72-73
22
+12V
+12Vout
63-66
23
+5V
+5Vout
61-62
25
GND
Ground
-
26
SEC CLEAR TO SEND
8255A STXD in
3
76-77
NOTES:
Jumper Out
-
*55-56
-
*82-83, *80-81
-
-
-
*80-81, *82-83
*58-59
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
1. All odd-numbered pins (1, 3, 5, ... 25) are on component side of the board. Pin 1 is the right-most pin when viewed from the
component side of the board with the extractors at the top.
2. Default jumpers *55-56 and *58-59 connect 8253 BAUD RATE ClK to 8251 TXC and RXC inputs, respectively. See Timer
Input Frequency (Counter 2) in table 2-4.
3. Optional jumper-selected output function for Intel 8255 Programmable Peripheral Interface. Refer to figure 5-2 sheet 4.
4. Optional jumper-selected output function for 8041/8741 Universal Peripheral Interface. Refer to figure 5-2 sheet 5.
5. Jumper 67-68 connects 8251A RTS output back to CTS input for those applications without CTS capability.
* Default jumpers connected at the factory.
2-12
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