Addressing; Initialization - Intel iSBC 80 Hardware Reference Manual

Intel isbc 80/30 single board computer hardware reference manual
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Programming Information
the terminal count is reached. The counter is re-
triggerable; the output will not go low until the full
count after the rising edge of the gate input.
Table 3 -7 provides a summary of the counter operation
versus the gate inputs; The gate inputs to Counters 0 and 2
are tied high by default jumpers; these gates may option-
ally be controlled by Port EA. The gate input to Counter 2
is floating high and not optionally controlled.
Table 3-7. PIT Counter Operation Vs. Gate Inputs
~
Low
tatus
Or Going
Rising
High
Modes
Low
0
Disables
Enables
counting
-
counting
1
1) Initiates
-
counting
2) Resets output
-
after next clock
2
1) Disables
counting
Initiates
Enables
-
2) Sets output
counting
counting
high
immediately
3
1) Disables
counting
Initiates
Enables
2) Sets output
counting
counting
high
immediately
4
Disables
Enables
-
counting
counting
5
Initiates
-
-
counting
iSBC 80/30
3-18. ADDRESSING
As listed in table 3-2, the PIT uses four consecutive I/O
addresses: DC through DF. Addresses DC, DD, and DE,
respectively, are used in loading and reading the count in
Counters 0, 1, and 2. Address DF is used in writing the
mode control word to the desired counter.
3-19. INITIALIZATION
To initialize the PIT chips, perform the following:
a.
Write mode control word for Counter 0 to DF. Note
that all mode control words are written to DF, since
mode control word must specify which counter is
being programmed. (Refer to figure 3-8.) Table 3-8
provides a sample subroutine for writing mode con-
trol words to all three counters.
b.
Assuming mode control word has selected a 2-byte
load, load least-significant byte of count into Counter
o
at DC. (Count value to be loaded is described in
paragraphs 3-22 through 3-24). Table 3-9 provides a
sample subroutine for loading 2-byte count value.
c.
Load most-significant byte of count into Counter 0
at DC.
NOTE
Be sure to enter the downcount in two bytes if
the counter was programmed for a two-byte
entry in the mode control word. Similarly,
enter the downcount value in BCD if the counter
was so programmed.
d.
Repeat steps a, b, and c for Counters 1 and 2.
Table 3-8. Typical PIT Control Word Subroutine
3-10
;INTIMR INITIALIZES COUNTERS 0, 1, 2.
;COUNTERS 0 AND 1 ARE INITIALIZED AS INTERRUPT TIMERS.
;COUNTER 2 IS INITIALIZED AS BAUD RATE GENERATOR.
;ALL THREE COUNTERS ARE SET UP FOR 16-81T OPERATION.
;USES-NOTHING; DESTROYS-A.
INTIMR:
MVI
OUT
MVI
OUT
MVI
OUT
RET
END
A,30H
ODF
A,70H
ODF
A, B6H
ODF
;MODE CONTROL WORD FOR COUNTERO
;MODE CONTROL WORD FOR COUNTER 1
;MODE CONTROL WORD FORCOUNTER2

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