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32581C
6.2.9.3
Power Planes Control
The SC3200 supports up to three power planes. Three sig-
nals are used to control these power planes. Table 6-6
describes the signals and when each is asserted.
Table 6-6. Power Planes Control Signals vs.
Sleep States
Signal
S0
PWRCNT1
1
PWRCNT2
1
ONCTL#
0
These signals allow control of the power of system devices
and the SC3200 itself. Table 6-7 describes the SC3200
power planes with respect to the different Sleep and Global
states.
Table 6-7. Power Planes vs. Sleep/Global States
V
, V
Sleep/
CORE
I/O,
V
Global State
PLL
S0, SL1 and
On
SL2
SL3, SL4
Off
and SL5
G3
Off
No Power
Off
Illegal
On
The SC3200 power planes are controlled externally by the
three signals (i.e., the system designer should make sure
the system design is such that Table 6-7 is met) for all sup-
ported Sleep states.
V
and V
are not controlled by any control signal. V
SB
BAT
exists as long as the AC power is plugged in (for desktop
systems) or the main battery is charged (for mobile sys-
tems). V
exists as long as the RTC battery is charged.
BAT
The case in which V
does not exist is called Mechanical
SB
Off (G3).
158
SL4
and
SL1
SL2
SL3
SL5
1
0
0
1
1
0
0
0
0
V
, V
V
SB
SBL
BAT
On
On or Off
On
On or Off
Off
On
Off
Off
Off
On or Off
6.2.9.4
Power Management Events
The SC3200 supports power management events that can
manage:
• Transition of the system from a Sleep state to a Work
state. This is done by the hardware. These events are
defined as wakeup events.
• Enabled wakeup events to set the WAK_STS bit
(F1BAR1+I/O Offset 08h[15]) to 1, when transitioning
the system back to the working state.
• Generation of an interrupt. This invokes the relevant
software driver. The interrupt can either be an SMI or
0
SCI (selected by the SCI_EN bit, F1BAR1+I/O Offset
0
0Ch[0]). These events are defined as interrupt events.
1
Table 6-8 lists the power management events that can gen-
erate an SCI or SMI.
Table 6-8. Power Management Events
Event
Power Button
Power Button Override
Bus Master Request
Thermal Monitoring
USB
RTC
ACPI Timer
GPIO
SDATA_IN2 (AC97)
IRRX1
RI2#
GPWIO
Internal SMI signal
SB
AMD Geode™ SC3200 Processor Data Book
Core Logic Module
SCI
SMI
Yes
Yes
Yes
-
Yes
-
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
-
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