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32581C
9.1.4
Operating Conditions
Table 9-3 lists the various power supplies of the SC3200 and provides the device operating conditions.
Symbol
(Note 1)
Parameter
T
Operating case temperature
C
AV
Analog power supply. Powers internal ana-
CCUSB
log circuits and some external signals (see
Table 9-4).
V
Battery supply voltage. Powers RTC and
BAT
ACPI when V
least 0.5V), and some external signals (see
Table 9-4).
V
I/O buffer power supply. Powers most of
IO
the external signals (see Table 9-4); certain
signals within this power plane are 5V
tolerant.
V
Core processor and internal digital power
CORE
supply. Powers internal digital logic, includ-
ing internal frequency multipliers.
V
PLL. Internal Phase Locked Loops (PLL)
PLL2
power supply.
V
PLL3
V
Standby power supply. Powers RTC and
SB
ACPI when V
and some external signals (see Table 9-4).
V
Standby logic. Powers internal logic
SBL
needed to support Standby V
V
requires a 0.1 µF bypass capacitor to
SBL
V
.
SS
Note 1. For V
(Input High Voltage), V
IH
erating conditions refer to Section 9.2 "DC Characteristics" on page 357.
Notes:
1)
All power sources except V
even if the function is not used.
2)
V
, and V
must be on if any other voltage is
SB
SBL
applied. V
and V
SB
BAT
rately. See Section 9.3.15 "Power-Up Sequencing" on
page 416.
3)
The power planes of the SC3200 can be turned on or
off. For more information, see Section 6.2.9 "Power
Management Logic" on page 156.
352
Table 9-3. Operating Conditions
is greater than V
(by at
BAT
SB
is greater than V
-0.5V,
SB
BAT
.
SB
(Input Low Voltage), I
IL
must be connected,
BAT
voltages can be applied sepa-
Min
Typ
Max
0
-
85
3.14
3.3
3.46
2.4
3.0
3.46
3.14
3.3
3.46
1.71
1.8
1.99
3.14
3.3
3.46
3.14
3.3
3.46
1.71
1.8
1.99
(Output High Current), and I
OH
4)
It is recommended that the voltage difference between
V
and V
be less than 0.25V, in order to reduce
CORE
SBL
leakage current. If the voltage difference exceeds
0.25V, excessive leakage current is used in gates that
are connected on the boundary between voltage
domains.
5)
It is recommended that the voltage difference between
V
and V
be less than 0.25V, in order to reduce
IO
SB
leakage current. If the voltage difference exceeds
0.25V, excessive leakage current is used in gates that
are connected on the boundary between voltage
domains.
AMD Geode™ SC3200 Processor Data Book
Electrical Specifications
Unit
Comments
o
C
V
V
V
V
V
V
V
(Output Low Current) op-
OL
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