Figure 9-28. Sustained Ultradma Data In Burst Timing Diagram - AMD Geode SC3200 Data Book

Electrical Specifications
IDE_IRDY0
(DSTROBE0)
at device
IDE_DATA[15:0]
at device
IDE_IRDY0
(DSTROBE0)
at host
IDE_DATA[15:0]
at host
Note: IDE_DATA[15:0] and IDE_IRDY[0:1] (DSTROBE[0:1]) signals are shown at both the host and the device to
emphasize that cable settling time and cable propagation delay do not allow the data signals to be considered sta-
ble at the host until a certain amount of time after they are driven by the device.

Figure 9-28. Sustained UltraDMA Data In Burst Timing Diagram

AMD Geode™ SC3200 Processor Data Book
t
2CYC
t
CYC
t
t
DVS
DVH
t
DVH
t
t
t
DH
DS
DH
t
CYC
t
2CYC
t
t
DVS
DVH
t
t
DH
DS
32581C
391