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General Configuration Block
Table 4-2. Multiplexing, Interrupt Selection, and Base Address Registers (Continued)
Bit
Description
25
AC97CKEN (Enable AC97_CLK Output). This bit enables the output drive of AC97_CLK (ball P31).
0: AC97_CLK output is HiZ.
1: AC97_CLK output is enabled.
24
TFTIDE (TFT/IDE). Determines whether certain balls are used for TFT signals or for IDE signals. Note that there are no
additional dependencies.
Ball #
A26 / AD3
C26 / AE1
C17 / U2
B24 / AC3
A24 / AC1
D23 / AC2
C23 / AB4
B23 / AB1
A23 / AA4
C22 / AA3
B22 / AA2
A21 / Y3
C20 / Y2
A20 / Y1
C19 / W4
B19 / W3
A19 / V3
C18 / V2
B18 / V1
A27 / AF2
C16 / P2
C21 / Y4
D24 / AD2
C24 / AC4
C25 / AD4
A22 / AA1
A25 / AD1
D25 / AF1
AMD Geode™ SC3200 Processor Data Book
0: IDE Signals
Name
IDE_ADDR0
IDE_ADDR1
IDE_ADDR2
IDE_DATA0
IDE_DATA1
IDE_DATA2
IDE_DATA3
IDE_DATA4
IDE_DATA5
IDE_DATA6
IDE_DATA7
IDE_DATA8
IDE_DATA9
IDE_DATA10
IDE_DATA11
IDE_DATA12
IDE_DATA13
IDE_DATA14
IDE_DATA15
IDE_CS0#
IDE_CS1#
IDE_IOR0#
IDE_IOW0#
IDE_DREQ0
IDE_DACK0#
IDE_RST#
IDE_IORDY0
IRQ14
32581C
1: GPIO and TFT Signals
Name
TFTD3
TFTD2
TFTD4
TFTD6
TFTD16
TFTD14
TFTD12
FP_VDD_ON
CLK27M
IRQ9
INTD#
GPIO40
DDC_SDA
DDC_SCL
GPIO41
TFTD13
TFTD15
TFTD17
TFTD7
TFTD5
TFTDE
TFTD10
TFTD9
TFTD8
TFTD0
TFTDCK
TFTD11
TFTD1
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