AMD Geode SC3200 Data Book page 254

32581C
Table 6-34. F1BAR1+I/O Offset: ACPI Support Registers (Continued)
Bit Description
3:0 SCI_IRQ_ROUTE. SCI is routed to:
0000: Disable
0001: IRQ1
0010: Reserved
0011: IRQ3
For more details see Section 6.2.6.3 "Programmable Interrupt Controller" on page 153.
Offset 1Ch-1Fh
Note: This register can also be read at F1BAR0+I/O Offset 1Ch.
31:24 Reserved.
23:0 TMR_VAL. (Read Only) This bit field contains the running count of the power management timer.
Offset 20h
7:1 Reserved.
0 Arbiter Disable. Disables the PCI arbiter when set by the OS. Used during C3 transition.
0: Arbiter not disabled. (Default)
1: Disable arbiter.
Offset 21h-FFh
The read value for these registers is undefined.
254
Core Logic Module - SMI Status and ACPI Registers - Function 1
0100: IRQ4
0101: IRQ5
0010: IRQ6
0011: IRQ7
ACPI Timer Register (RO)
PM2_CNT — PM2 Control Register (R/W)
Reserved
1000: IRQ8
1001: IRQ9
1010: IRQ10
1011: IRQ11
AMD Geode™ SC3200 Processor Data Book
1100: IRQ12
1101: IRQ13
1110: IRQ14
1111: IRQ15
Reset Value: xxxxxxxxh
Reset Value: 00h
Reset Value: 00h