Table 6-28. Isa Legacy I/O Register Summary - AMD Geode SC3200 Data Book

32581C
I/O Port Type
DMA Channel Control Registers (Table 6-43)
000h R/W
001h R/W
002h R/W
003h R/W
004h R/W
005h R/W
006h R/W
007h R/W
008h Read
Write
009h WO
00Ah W
00Bh WO
00Ch WO
00Dh WO
00Eh WO
00Fh WO
0C0h R/W
0C2h R/W
0C4h R/W
0C6h R/W
0C8h R/W
0CAh R/W
0CCh R/W
0CEh R/W
0D0h Read
Write
0D2h WO
0D4h W
0D6h WO
0D8h WO
0DAh WO
0DCh WO
0DEh WO
DMA Page Registers (Table 6-44)
081h R/W
082h R/W
083h R/W
087h R/W
089h R/W
08Ah R/W
08Bh R/W
08Fh R/W
481h R/W
482h R/W
483h R/W
186

Table 6-28. ISA Legacy I/O Register Summary

Name
DMA Channel 0 Address Register
DMA Channel 0 Transfer Count Register
DMA Channel 1 Address Register
DMA Channel 1 Transfer Count Register
DMA Channel 2 Address Register
DMA Channel 2 Transfer Count Register
DMA Channel 3 Address Register
DMA Channel 3 Transfer Count Register
DMA Status Register, Channels 3:0
DMA Command Register, Channels 3:0
Software DMA Request Register, Channels 3:0
DMA Channel Mask Register, Channels 3:0
DMA Channel Mode Register, Channels 3:0
DMA Clear Byte Pointer Command, Channels 3:0
DMA Master Clear Command, Channels 3:0
DMA Clear Mask Register Command, Channels 3:0
DMA Write Mask Register Command, Channels 3:0
DMA Channel 4 Address Register (Not used)
DMA Channel 4 Transfer Count Register (Not Used)
DMA Channel 5 Address Register
DMA Channel 5 Transfer Count Register
DMA Channel 6 Address Register
DMA Channel 6 Transfer Count Register
DMA Channel 7 Address Register
DMA Channel 7 Transfer Count Register
DMA Status Register, Channels 7:4
DMA Command Register, Channels 7:4
Software DMA Request Register, Channels 7:4
DMA Channel Mask Register, Channels 7:4
DMA Channel Mode Register, Channels 7:4
DMA Clear Byte Pointer Command, Channels 7:4
DMA Master Clear Command, Channels 7:4
DMA Clear Mask Register Command, Channels 7:4
DMA Write Mask Register Command, Channels 7:4
DMA Channel 2 Low Page Register
DMA Channel 3 Low Page Register
DMA Channel 1 Low Page Register
DMA Channel 0 Low Page Register
DMA Channel 6 Low Page Register
DMA Channel 7 Low Page Register
DMA Channel 5 Low Page Register
Sub-ISA Refresh Low Page Register
DMA Channel 2 High Page Register
DMA Channel 3 High Page Register
DMA Channel 1 High Page Register
Core Logic Module - Register Summary
AMD Geode™ SC3200 Processor Data Book
Reference
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