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32581C
Table 6-26. PCIUSB: USB PCI Configuration Register Summary
PCIUSB
Width
Index
(Bits)
Type
00h-01h
16
02h-03h
16
04h-05h
16
R/W
06h-07h
16
R/W
08h
8
09h-0Bh
24
0Ch
8
R/W
0Dh
8
R/W
0Eh
8
0Fh
8
10h-13h
32
R/W
14h-2Bh
---
2Ch-2Dh
16
2Eh-2Fh
16
30h-3Bh
---
3Ch
8
R/W
3Dh
8
R/W
3Eh
8
3Fh
8
40h-43h
32
R/W
44h
8
R/W
45h-FFh
---
184
Name
RO
Vendor Identification
RO
Device Identification
Command Register
Status Register
RO
Device Revision ID
RO
Class Code
Cache Line Size
Latency Timer
RO
Header Type
RO
BIST Register
Base Address 0
---
Reserved
RO
Subsystem Vendor ID
RO
Subsystem ID
---
Reserved
Interrupt Line Register
Interrupt Pin Register
RO
Min. Grant Register
RO
Max. Latency Register
ASIC Test Mode Enable Register
ASIC Operational Mode Enable
---
Reserved
Core Logic Module - Register Summary
Reset Value
0E11h
A0F8h
00h
0280h
08h
0C0310h
00h
00h
00h
00h
00000000h
00h
0E11h
A0F8h
00h
00h
01h
00h
50h
000F0000h
00h
00h
AMD Geode™ SC3200 Processor Data Book
Reference
(Table 6-41)
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