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32579B
6.2.9.3
Power Planes Control
The SC1200/SC1201 processor supports up to three
power planes. Three signals are used to control these
power planes. Table 6-6 describes the signals and when
each is asserted.
Table 6-6. Power Planes Control Signals vs.
Sleep States
Signal
S0
PWRCNT1
1
PWRCNT2
1
ONCTL#
0
These signals allow control of the power of system devices
and the SC1200/SC1201 processor itself. Table 6-7
describes the SC1200/SC1201 processor's power planes
with respect to the different Sleep and Global states.
Table 6-7. Power Planes vs. Sleep/Global States
V
,
CORE
V
, V
CCCRT
Sleep/
AV
V
Global
CCTV,
PLL
AV
State
CCCRT
S0, SL1 and
On
SL2
SL3, SL4
Off
and SL5
G3
Off
No Power
Off
Illegal
On
The SC1200/SC1201 processor's power planes are con-
trolled externally by the three signals (i.e., the system
designer should make sure the system design is such that
Table 6-7 is met) for all supported Sleep states.
V
and V
are not controlled by any control signal. V
SB
BAT
exists as long as the AC power is plugged in (for desktop
systems) or the main battery is charged (for mobile sys-
tems). V
exists as long as the RTC battery is charged.
BAT
The case in which V
does not exist is called Mechanical
SB
Off (G3).
160
SL4
and
SL1
SL2
SL3
SL5
1
0
0
1
1
0
0
0
0
,
I/O
,
V
, V
V
SB
SBL
BAT
On
On or Off
On
On or Off
Off
On
Off
Off
Off
On or Off
6.2.9.4
Power Management Events
The SC1200/SC1201 processor supports power manage-
ment events that can manage:
• Transition of the system from a Sleep state to a Work
state. This is done by the hardware. These events are
defined as wakeup events.
• Enabled wakeup events to set the WAK_STS bit
(F1BAR1+I/O Offset 08h[15]) to 1, when transitioning
the system back to the working state.
• Generation of an interrupt. This invokes the relevant
software driver. The interrupt can either be an SMI or
SCI (selected by the SCI_EN bit, F1BAR1+I/O Offset
0
0Ch[0]). These events are defined as interrupt events.
0
Table 6-8 lists the power management events that can gen-
1
erate an SCI or SMI.
Table 6-8. Power Management Events
Event
Power Button
Power Button Override
Bus Master Request
Thermal Monitoring
USB
RTC
ACPI Timer
GPIO
SDATA_IN2 (AC97)
IRRX1
RI2#
GPWIO
Internal SMI signal
SB
AMD Geode™ SC1200/SC1201 Processor Data Book
Core Logic Module
SCI
SMI
Yes
Yes
Yes
-
Yes
-
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
-
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