AMD Geode SC3200 Data Book page 33

Signal Definitions
Table 3-2.
Ball I/O
No. Signal Name (PU/PD)
F29 TDI I
(PU
22.5
F30 GTEST I
(PD
22.5
F31 VPCKIN I
G1 STOP# I/O
(PU
22.5
D15 I/O
(PU
22.5
G2 V GND
SS
G3 V PWR
IO
G4 V GND
SS
G28 V GND
SS
G29 V PWR
IO
G30 V GND
SS
G31 VPD7 I
H1 SERR# I/O
(PU
22.5
H2 PERR# I/O
(PU
22.5
H3 LOCK# I/O
(PU
22.5
H4 C/BE3# I/O
(PU
22.5
D11 I/O
(PU
22.5
H28 VPD6 I
H29 VPD5 I
H30 VPD4 I
H31 VPD3 I
J1 AD13 I/O
A13 O
J2 C/BE1# I/O
(PU
22.5
D9 I/O
(PU
22.5
J3 AD15 I/O
A15 O
J4 PAR I/O
(PU
22.5
D12 I/O
(PU
22.5
J28 VPD2 I
J29 VPD1 I
J30 VPD0 I
AMD Geode™ SC3200 Processor Data Book
BGU481 Ball Assignment - Sorted by Ball Number (Continued)
1
Buffer Power
Type Rail Configuration
IN V ---
PCI IO
)
IN V ---
T IO
)
IN V ---
T IO
IN , V Cycle Multiplexed
PCI IO
)
O
PCI
IN ,
PCI
)
O
PCI
--- --- ---
--- --- ---
--- --- ---
--- --- ---
--- --- ---
--- --- ---
IN V ---
T IO
IN , V ---
PCI IO
)
OD
PCI
IN , V ---
PCI IO
)
O
PCI
IN , V ---
PCI IO
)
O
PCI
IN , V Cycle Multiplexed
PCI IO
)
O
PCI
IN ,
PCI
)
O
PCI
IN V ---
T IO
IN V ---
T IO
IN V ---
T IO
IN V ---
T IO
IN , V Cycle Multiplexed
PCI IO
O
PCI
O
PCI
IN , V Cycle Multiplexed
PCI IO
)
O
PCI
IN ,
PCI
)
O
PCI
IN , V Cycle Multiplexed
PCI IO
O
PCI
O
PCI
IN , V Cycle Multiplexed
PCI IO
)
O
PCI
IN ,
PCI
)
O
PCI
IN V ---
T IO
IN V ---
T IO
IN V ---
T IO
Ball I/O
No. Signal Name (PU/PD)
J31 GPIO39 I/O
(PU
22.5
SERIRQ I/O
K1 AD11 I/O
A11 O
K2 V PWR
IO
K3 V GND
SS
K4 AD14 I/O
A14 O
K28 GPIO38/IRRX2 I/O
(PU
22.5
LPCPD# O
K29 V PWR
IO
K30 V GND
SS
K31 GPIO37 I/O
(PU
22.5
LFRAME# O
L1 C/BE0# I/O
(PU
22.5
D8 I/O
(PU
22.5
L2 AD9 I/O
A9 O
L3 AD10 I/O
A10 O
L4 AD12 I/O
A12 O
L28 GPIO36 I/O
(PU
22.5
LDRQ# I
32581C
1
Buffer Power
Type Rail Configuration
IN , V 4
PMR[14] = 0 and
PCI IO
)
O
4
PCI PMR[22] = 0
IN , 4
PMR[14] = 1 and
PCI
O
4
PCI PMR[22] = 1
IN , V Cycle Multiplexed
PCI IO
O
PCI
O
PCI
--- --- ---
--- --- ---
IN , V Cycle Multiplexed
PCI IO
O
PCI
O
PCI
IN , V 4
PMR[14] = 0 and
PCI IO
)
O
4
PMR[22] = 0. The
PCI
IRRX2 input is con-
nected to the input
path of GPIO38.
There is no logic
required to enable
IRRX2, just a sim-
ple connection.
Hence, when
GPIO38 is the
selected function,
IRRX2 is also
selected.
O 4
PMR[14] = 1 and
PCI
4
PMR[22] = 1
--- --- ---
--- --- ---
IN , V 4
PMR[14] = 0 and
PCI IO
)
O
4
PMR[22] = 0
PCI
O 4
PMR[14] = 1 and
PCI
4
PMR[22] = 1
IN , V Cycle Multiplexed
PCI IO
)
O
PCI
IN ,
PCI
)
O
PCI
IN , V Cycle Multiplexed
PCI IO
O
PCI
O
PCI
IN , V Cycle Multiplexed
PCI IO
O
PCI
O
PCI
IN , V Cycle Multiplexed
PCI IO
O
PCI
O
PCI
IN , V 4
PMR[14] = 0 and
PCI IO
)
O
4
PCI PMR[22] = 0
IN 4
PMR[14] = 1 and
PCI
4
PMR[22] = 1
33