Table 5-60. Bank 5 Bit Map; Table 5-61. Bank 6 Bit Map; Table 5-62. Bank 7 Bit Map - AMD Geode SC3200 Data Book

32581C
Register
Offset Name
06h RFRML(L)/
RFRCC(L)
07h RFRML(H)/
RFRCC(H)
Register
Offset Name
00h SPR2
01h SPR3
02h RSVD
03h BSR BKSE
04h IRCR2 RSVD
05h FRM_ST VLD
06h RFRL(L)/
LSTFRC
07h RFRL(H)
Register
Offset Name
00h IRCR3 SHDM_DS
01h MIR_PW
02h SIR_PW
03h BSR BKSE
04h BFPL
05h-07h RSVD
Register
Offset Name
00h IRRXDC
01h IRTXMC
02h RCCFG R_LEN
03h BSR BKSE
04h IRCFG1 STRV_MS
05h-06h RSVD
07h IRCFG4 RSVD
138
Table 5-59. Bank 4 Bit Map (Continued)
7 6 5
RFRML[7:0] / RFRCC[7:0] (Low Byte Data)
RSVD

Table 5-60. Bank 5 Bit Map

7 6 5
SFTSL FEND_MD
LOST_FR RSVD
RFRL[7:0] (Low Byte Data) / LSTFRC[7:0]

Table 5-61. Bank 6 Bit Map

7 6 5
SHMD_DS FIR_CRC
RSVD
RSVD
MBF[3:0]

Table 5-62. Bank 7 Bit Map

7 6 5
DBW[2:0]
MCPW[2:0]
T_OV RXHSC
SIRC[2:0]
IRRX_MD IRSL0_DS
Bits
4 3
RFRML[12:8] / RFRCC[12:8] (High Byte Data)
Bits
4 3
Scratchpad 2
Scratchpad 2
RSVD
BSR[6:0] (Bank Select)
AUX_IRRX TX_MS
MAX_LEN PHY_ERR
RFRL[15:8] (High Byte Data)
Bits
4 3
MIR_CRC RSVD TXCRC_INV TXCRC_DS
BSR[6:0] (Bank Select)
RSVD
Bits
4 3
RCDM_DS RSVD
BSR[6:0] (Bank Select)
IRID3
RSVD
RXINV IRSL21_DS
AMD Geode™ SC3200 Processor Data Book
SuperI/O Module
2 1
2 1
MDRS IRMSSL IR_FDPLX
BAD_CRC OVR1
2 1
MPW[3:0]
SPW[3:0]
FPL[3:0]
2 1
DFR[4:0]
MCFR[4:0]
TXHSC RC_MMD[1:0]
IRIC[2:0]
RSVD
0
0
OVR2
0
RSVD
0