Sun Microsystems Sun Blade 1000 Service Manual page 89

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diag-level Variable Set to min (2-Way CPU) (5 of 12)
CODE EXAMPLE 3-3
{0}Test address up
{1}Test cell disturbance
{0}Test address down
{1}* 8K ITLB RAM
{1}Test address up
{0}Test cell disturbance
{1}Test address down
{1}Test cell disturbance
{0}* 4M ITLB TAG
{0}Test address up
{0}Test address down
{0}Test cell disturbance
{1}* 4M ITLB TAG
{0}* 8K ITLB TAG
{1}Test address up
{0}Test address up
{1}Test address down
{0}Test address down
{1}Test cell disturbance
{0}Test address line transitions
{1}* 8K ITLB TAG
{1}Test address up
{0}* IMMU Init
{1}Test address down
{0}* DMMU Init
{1}Test address line transitions
{0}Mapping done. MMU enabled
{1}* IMMU Init
{0}* Memory address selection Initial area
{1}* DMMU Init
{1}Mapping done. MMU enabled
{1}* Memory address selection Initial area
{0}* E-Cache Global Vars Init
{0}* E-Cache Quick Verification
{1}* E-Cache Global Vars Init
{1}* E-Cache Quick Verification
{0}* Ecache TAGS
{0}Test address up
{1}* Ecache TAGS
{1}Test address up
{0}Test address down
{1}Test address down
{0}Test cell disturbance
{1}Test cell disturbancen
Chapter 3 Power On Self-Test
3-35

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