Sun Microsystems Sun Blade 1000 Service Manual page 66

CODE EXAMPLE 3-1
{0}Test address line transitions
{0}* IMMU Init
{0}* DMMU Init
{0}Mapping done. MMU enabled
{0}* Memory address selection Initial area
{0}* Memory marching Initial area
{0}* E-Cache Global Vars Init
{0}* E-Cache Quick Verification
{0}* Ecache TAGS
{0}Test address up
{0}Test address down
{0}Test cell disturbance
{0}Test data reliability
{0}Test address line transitions
{0}* Ecache Address Line
{0}* Partial Ecache Init
{0}* BBC E-Star Registers
{0}* I-Cache RAM
{0}Test address up
{0}Test address down
{0}Test cell disturbance
{0}Test data reliability
3-12 Sun Blade 1000 and Sun Blade 2000 Service Manual • January 2002
diag-level Variable Set to max (2-Way CPU) (6 of 15)
{1}Test address down
{1}Test address line transitions
{1}* IMMU Init
{1}* DMMU Init
{1}Mapping done. MMU enabled
{1}* Memory address selection Initial area
{1}* Memory marching Initial area
{1}* E-Cache Global Vars Init
{1}* E-Cache Quick Verification
{1}* Ecache TAGS
{1}Test address up
{1}Test address down
{1}Test cell disturbance
{1}Test data reliability
{1}Test address line transitions
{1}* Ecache Address Line
{1}* Partial Ecache Init
{1}* I-Cache RAM
{1}Test address up
{1}Test address down
{1}Test cell disturbance
{1}Test data reliability