Sun Microsystems Sun Blade 1000 Service Manual page 85

diag-level Variable Set to min (2-Way CPU) (1 of 12)
CODE EXAMPLE 3-3
@(#) 4.0 Version 28 created 2000/06/27 18:05
Clearing TLBs Done
Power-On Reset
Executing Power On SelfTest
{0}@(#)POST, v4.1.1 06/30/2000 02:15 PM
{1}
{0}* Test CPU present
{1}@(#)POST, v4.1.1 06/30/2000 02:15 PM
{1}* Test CPU present
{0}Soft POR to the whole system
{1}Soft POR to the whole system
{0}* Configure I2C controller 0
{0}* Configure I2C controller 1
{0}* I2C Controller Loopback Test
{0}* Read JTag IDs of all ASICs
{0} BBC
{0} SCSI
{0} I chip
{0} RIO
{0} Schizo
{0} CPMS
{0} CPMS
{0} CPMS
{0} CPMS
{0} CPMS
{0} CPMS
{0}* Probing Seeprom on DIMMs and CPU modules
{0}WARNING: DIMM 0 missing
{0}WARNING: DIMM 2 missing
{0}WARNING: DIMM 4 missing
{0}WARNING: DIMM 6 missing
{0}CPU0 Sensor package temperature 32 oC
{0}CPU1 Sensor package temperature 24 oC
{0}WARNING: Temperature sensor on UPA0 missing
{0}WARNING: Temperature sensor on UPA1 missing
{0}Smart card reader present
{0}* Read parameters from seeproms
{0}
{0}DIMM 0:
{0}DIMM 1:
{0}DIMM 2:
{0}DIMM 3:
{0}DIMM 4:
{0}DIMM 5:
JTag ID: 1483203b
JTag ID: 15060045
JTag ID: d1e203b
JTag ID: 3e5d03b
JTag ID: 1024c06d
JTag ID: 1142903b
JTag ID: 1142903b
JTag ID: 1142903b
JTag ID: 1142903b
JTag ID: 1142903b
JTag ID: 1142903b
Size/bank(MB)
0
64
0
64
0
64
Number of banks
0
2
0
2
0
2
Chapter 3 Power On Self-Test 3-31