diag-level Variable Set to max (2-Way CPU) (9 of 15)
CODE EXAMPLE 3-1
{0}Test address line transitions
{1}Test address line transitions
{0}* D-Cache Init
{1}* D-Cache Init
{0}* W-Cache RAM
{0}Test address up
{0}Test address down
{0}Test cell disturbance
{0}Test data reliability
{1}* W-Cache RAM
{1}Test address up
{1}Test address down
{1}Test cell disturbance
{1}Test data reliability
{0}Test address line transitions
{0}* W-Cache TAGS
{0}Test address up
{0}Test address down
{0}Test cell disturbance
{0}Test data reliability
{0}Test address line transitions
{0}* W-Cache SnoopTAGS
{0}Test address up
{1}Test address line transitions
{0}Test address down
{0}Test cell disturbance
{1}* W-Cache TAGS
{0}Test data reliability
{1}Test address up
{1}Test address down
{0}Test address line transitions
{1}Test cell disturbance
{0}* W-Cache Init
{1}Test data reliability
{0}* P-Cache RAM
{0}Test address up
{1}Test address line transitions
{0}Test address down
{1}* W-Cache SnoopTAGS
{1}Test address up
{0}Test cell disturbance
{1}Test address down
{1}Test cell disturbance
{0}Test data reliability
{1}Test data reliability
Chapter 3 Power On Self-Test
3-15