Sun Microsystems Sun Blade 1000 Service Manual page 277

LM-SUN
SEEROM
UltraSPARC III
processor
* SCI
Addr
Misc
Ctl
70 105
UltraSPARC III Processor Functional Block Diagram
FIGURE C-2
The base CPU module frequency is 600 MHz. The Sun Blade 2000 also supports
faster processor speeds up to 1050 MHz.
Each CPU module plugs vertically into the motherboard through a set of two
connectors. Each module is equipped with a mechanical insertion/extraction
mechanism.
The processors are interconnected through the Sun CrossBar Interconnect bus but,
the CPU module(s) only support the Sun CrossBar Interconnect address and
command signals. The Sun CrossBar Interconnect address and control signals along
with the data signals and the switch control signals, are routed through the module
connectors.
The UltraSPARC III processors directly support the main memory SDRAM. The
memory controller is on the same die as the processor. The address and control
signals for the SDRAM chips originate at the CPU chip pins and are routed to the
motherboard through the module connectors.
The CPU module(s) contain serial EEPROMs for self-identification at boot time. The
SEEPROM is interfaced through the I2C bus and provides the version of the CPU
module, the size and speed of the external cache, the maximum internal frequency of
the processor, and other operating parameters.
Thermal management relies on high air flow and a large heat sink radiation area to
maintain uniform temperature control for each CPU module. The temperature of the
CPU modules are monitored to avoid any destructive effect in case of fan failure.
Data
Address
Ctl
SDRAM
Data
Ctl
Addr/Ctl
19 144 25
Cache SRAMs
E$
E$
288
40
E$
18
E$
SDRAM
Ctl
10
Appendix C Functional Description
E$
E$
E$
E$
C-5