Sun Microsystems Ultra 20 User Manual page 124

TABLE C-1
Post Code
16h
17h
18h
19h
1Ah
1Bh
1Ch
1Dh
1Eh
1Fh
20h
21h
22h
23h
24h
25h
26h
27h
28h
C-4 Sun Ultra 20 Workstation User Guide • August 2006
BIOS Port 80 POST Codes (Continued)
Description
Initial onboard clock generator if Early_Init_Onboard_Generator is
defined. See also POST 26h.
Reserved.
Detect CPU information including brand, SMI type (Cyrix or Intel),
and CPU level (586 or 686).
Reserved.
Reserved.
Initial interrupts vector table. If no special specified, all hardware
interrupts are directed to SPURIOUS_INT_HDLR and software
interrupts to SPURIOUS_soft_HDLR.
Reserved.
Initial EARLY_PM_INIT switch.
Reserved.
Load keyboard matrix (notebook platform).
Reserved.
HPM initialization (notebook platform).
Reserved.
1. Check validity of RTC value–e.g. a value of 5Ah is an invalid
value for RTC minute.
2. Load CMOS settings into BIOS stack. If CMOS checksum fails, use
default value instead.
Prepare BIOS resource map for PCI and PnP use. If ESCD is valid,
consider the ESCD's legacy information.
Early PCI initialization:
• Enumerate PCI bus number.
• Assign memory and I/O resource.
• Search for a valid VGA device and VGA BIOS, and put it into
C000:0.
1. If Early_Init_Onboard_Generator is not defined, Onboard clock
generator initialization. Disable respective clock resource to empty
PCI and DIMM slots.
2. Init onboard PWM.
3. Init onboard H/W monitor devices.
Initialize INT 09 buffer.
Reserved.